From fd9abe1b5beafe776c51507dac32486f627c6ad8 Mon Sep 17 00:00:00 2001 From: Colin Cross Date: Wed, 4 Apr 2012 09:27:19 -0700 Subject: [PATCH] ARM: EXYNOS: fix CONFIG_DEBUG_LL addruart cannot read from the physical address of the chipid register, that will fail as soon as the mmu is turned on. Fixing it to read from the physical or virtual address depending on the mmu state also does not work, because there is a period between head.S and exynos_map_io where the mmu is on, the uart is mapped and used, but the chipid mapping is not yet present. Fix addruart to use the ARM Main ID cp15 register to determine if the core is Cortex A15 (EXYNOS5) or not (EXYNOS4). Signed-off-by: Colin Cross Tested-by: Marek Szyprowski Tested-by: Thomas Abraham Signed-off-by: Kukjin Kim --- arch/arm/mach-exynos/include/mach/debug-macro.S | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-exynos/include/mach/debug-macro.S b/arch/arm/mach-exynos/include/mach/debug-macro.S index 6c857ff0b5d8..e0c86ea475e7 100644 --- a/arch/arm/mach-exynos/include/mach/debug-macro.S +++ b/arch/arm/mach-exynos/include/mach/debug-macro.S @@ -21,10 +21,9 @@ */ .macro addruart, rp, rv, tmp - mov \rp, #0x10000000 - ldr \rp, [\rp, #0x0] - and \rp, \rp, #0xf00000 - teq \rp, #0x500000 @@ EXYNOS5 + mrc p15, 0, \tmp, c0, c0, 0 + and \tmp, \tmp, #0xf0 + teq \tmp, #0xf0 @@ A15 ldreq \rp, =EXYNOS5_PA_UART movne \rp, #EXYNOS4_PA_UART @@ EXYNOS4 ldr \rv, =S3C_VA_UART -- 2.20.1