From fc64f71b341a2161ac0b8ef639299b08bb47a873 Mon Sep 17 00:00:00 2001 From: Jiyu Yang Date: Wed, 9 Sep 2015 16:56:07 +0800 Subject: [PATCH] PD#105950 hibernate support for kernel 3.14 Change-Id: Iea2f4f5105a8aa5c5094314e57b3ae5f7757b0c8 --- mali/platform/mali_pm_device.c | 2 ++ mali/platform/mali_scaling.h | 1 + mali/platform/meson_bu/mali_clock.c | 6 ------ mali/platform/meson_bu/mali_clock.h | 8 ++++++++ mali/platform/meson_bu/scaling.c | 8 +++++++- 5 files changed, 18 insertions(+), 7 deletions(-) diff --git a/mali/platform/mali_pm_device.c b/mali/platform/mali_pm_device.c index 4f9e0d0..6149031 100755 --- a/mali/platform/mali_pm_device.c +++ b/mali/platform/mali_pm_device.c @@ -43,6 +43,8 @@ static int mali_os_freeze(struct device *device) MALI_DEBUG_PRINT(4, ("mali_os_freeze() called\n")); + mali_dev_freeze(); + if (NULL != device->driver && NULL != device->driver->pm && NULL != device->driver->pm->freeze) diff --git a/mali/platform/mali_scaling.h b/mali/platform/mali_scaling.h index e8c6cb1..003fd28 100644 --- a/mali/platform/mali_scaling.h +++ b/mali/platform/mali_scaling.h @@ -123,6 +123,7 @@ void set_mali_schel_mode(u32 mode); /* for frequency reporter in DS-5 streamline. */ u32 get_current_frequency(void); +void mali_dev_freeze(void); void mali_dev_restore(void); extern int mali_pm_statue; diff --git a/mali/platform/meson_bu/mali_clock.c b/mali/platform/meson_bu/mali_clock.c index b72631e..1570845 100644 --- a/mali/platform/meson_bu/mali_clock.c +++ b/mali/platform/meson_bu/mali_clock.c @@ -11,12 +11,6 @@ #define AML_CLK_LOCK_ERROR 1 #endif -#define HHI_MALI_CLK_CNTL 0x6C -#define mplt_read(r) readl((pmali_plat->reg_base_hiubus) + ((r)<<2)) -#define mplt_write(r, v) writel((v), ((pmali_plat->reg_base_hiubus) + ((r)<<2))) -#define mplt_setbits(r, m) mplt_write((r), (mplt_read(r) | (m))); -#define mplt_clrbits(r, m) mplt_write((r), (mplt_read(r) & (~(m)))); - static unsigned gpu_dbg_level = 0; module_param(gpu_dbg_level, uint, 0644); MODULE_PARM_DESC(gpu_dbg_level, "gpu debug level"); diff --git a/mali/platform/meson_bu/mali_clock.h b/mali/platform/meson_bu/mali_clock.h index c9129ad..9b8b392 100644 --- a/mali/platform/meson_bu/mali_clock.h +++ b/mali/platform/meson_bu/mali_clock.h @@ -12,6 +12,14 @@ #include #endif +#ifndef HHI_MALI_CLK_CNTL +#define HHI_MALI_CLK_CNTL 0x6C +#define mplt_read(r) readl((pmali_plat->reg_base_hiubus) + ((r)<<2)) +#define mplt_write(r, v) writel((v), ((pmali_plat->reg_base_hiubus) + ((r)<<2))) +#define mplt_setbits(r, m) mplt_write((r), (mplt_read(r) | (m))); +#define mplt_clrbits(r, m) mplt_write((r), (mplt_read(r) & (~(m)))); +#endif + //extern int mali_clock_init(struct platform_device *dev); int mali_clock_init_clk_tree(struct platform_device *pdev); diff --git a/mali/platform/meson_bu/scaling.c b/mali/platform/meson_bu/scaling.c index 871dd87..1a725a1 100644 --- a/mali/platform/meson_bu/scaling.c +++ b/mali/platform/meson_bu/scaling.c @@ -518,10 +518,16 @@ void mali_gpu_utilization_callback(struct mali_gpu_utilization_data *data) } #endif } +static u32 clk_cntl_save = 0; +void mali_dev_freeze(void) +{ + clk_cntl_save = mplt_read(HHI_MALI_CLK_CNTL); +} void mali_dev_restore(void) { - mali_perf_set_num_pp_cores(num_cores_enabled); + + mplt_write(HHI_MALI_CLK_CNTL, clk_cntl_save); if (pmali_plat && pmali_plat->pdev) { mali_clock_init_clk_tree(pmali_plat->pdev); } else { -- 2.20.1