From f99d3023f317fb3916b46465cc07a0cad3faa0a5 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Thu, 25 Aug 2005 16:22:09 +0000 Subject: [PATCH] Sprinkle a few more .set mipsX over xchg to make sure we dont' end up with 64-bit instructions on 32-bit processors, they tend to be unhappy about that kind of food ;-) Signed-off-by: Ralf Baechle --- include/asm-mips/system.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/include/asm-mips/system.h b/include/asm-mips/system.h index b1ac3f5bfc3b..b126545e96ed 100644 --- a/include/asm-mips/system.h +++ b/include/asm-mips/system.h @@ -302,7 +302,9 @@ static inline unsigned long __cmpxchg_u32(volatile int * m, unsigned long old, " .set mips3 \n" "1: ll %0, %2 # __cmpxchg_u32 \n" " bne %0, %z3, 2f \n" + " .set mips0 \n" " move $1, %z4 \n" + " .set mips3 \n" " sc $1, %1 \n" " beqzl $1, 1b \n" #ifdef CONFIG_SMP @@ -320,7 +322,9 @@ static inline unsigned long __cmpxchg_u32(volatile int * m, unsigned long old, " .set mips3 \n" "1: ll %0, %2 # __cmpxchg_u32 \n" " bne %0, %z3, 2f \n" + " .set mips0 \n" " move $1, %z4 \n" + " .set mips3 \n" " sc $1, %1 \n" " beqz $1, 1b \n" #ifdef CONFIG_SMP -- 2.20.1