From f8cdcd2daa445dbbf39526908829452d7cc8e5e8 Mon Sep 17 00:00:00 2001 From: Dohyun Kim Date: Mon, 18 Feb 2019 14:55:51 +0900 Subject: [PATCH] [9610] arm64: dtsi: Fix fimc_is_sensor2 use only dma2 ch PR JIRA ID: CPR-708 Change-Id: I50ef46c56e331b03652f0d6e9c2e92e23d6abec8 Signed-off-by: Dohyun Kim --- .../dts/exynos/exynos9610-robusta2-camera.dtsi | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/exynos/exynos9610-robusta2-camera.dtsi b/arch/arm64/boot/dts/exynos/exynos9610-robusta2-camera.dtsi index 944c14a2a670..0ada98486b0e 100644 --- a/arch/arm64/boot/dts/exynos/exynos9610-robusta2-camera.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos9610-robusta2-camera.dtsi @@ -656,15 +656,31 @@ &fimc_is_sensor2 { scenario = ; /* Normal, Vision, OIS etc */ + interrupts = <0 327 0>, /* MIPI-CSI2 */ + <0 333 0>, /* VC0 DMA2 */ + <0 333 0>, /* VC1 DMA2 */ + <0 333 0>, /* VC2 DMA2 */ + <0 333 0>; /* VC3 DMA2 */ id = <2>; csi_ch = <2>; - dma_ch = <3 2 2 2>; + dma_ch = <2 2 2 2>; vc_ch = <0 1 2 3>; flite_ch = ; is_bns = <0>; csi_mux = <0>; /* CSIS_DPHY[2:0] = [0 0 0] */ multi_ch = <0>; + camif_mux_val = <0x000020FF>; status = "okay"; + sensor2_ch_mode0: sensor2-ch-mode0 { + reg = <0x14470000 0x100>, /* VC0 DMA2 */ + <0x14470400 0x100>, /* VC0 DMA2 COMMON */ + <0x14470100 0x100>, /* VC1 DMA2 */ + <0x14470400 0x100>, /* VC1 DMA2 COMMON */ + <0x14470200 0x100>, /* VC2 DMA2 */ + <0x14470400 0x100>, /* VC2 DMA2 COMMON */ + <0x14470300 0x100>, /* VC3 DMA2 */ + <0x14470400 0x100>; /* VC3 DMA2 COMMON */ + }; }; &fimc_is_sensor3 { -- 2.20.1