From f70ae24cc885d8f616b5c29814bc42c07d0c42d8 Mon Sep 17 00:00:00 2001 From: wangjiao Date: Thu, 29 Nov 2018 11:52:50 +0800 Subject: [PATCH] (CR):[Kane]:[factory]Modify lcd mipi timing value Change-Id: I9fc9795dafc6a918e5d3a62cdc311e2d42e82d1f Signed-off-by: wangjiao --- arch/arm64/boot/dts/exynos/exynos9610-display-lcd.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/exynos/exynos9610-display-lcd.dtsi b/arch/arm64/boot/dts/exynos/exynos9610-display-lcd.dtsi index a7519f062b02..e2722ed3290a 100755 --- a/arch/arm64/boot/dts/exynos/exynos9610-display-lcd.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos9610-display-lcd.dtsi @@ -335,10 +335,10 @@ timing,refresh = <60>; timing,h-porch = <8 22 8>; timing,v-porch = <36 27 5>; - timing,dsi-hs-clk = <1386>; + timing,dsi-hs-clk = <1390>; /* TODO : pms value to be set */ - timing,pmsk = <3 320 1 0>; - timing,dsi-escape-clk = <20>; + timing,pmsk = <1 107 1 0>; + timing,dsi-escape-clk = <10>; mic_en = <0>; /* 0: Disable, 1: Enable */ mic_ratio = <0>; /* 0: 1/2 mic, 1: 1/3 mic */ mic_ver = <0>; /* 0: mic v1.1, 1: v1.2, 2: v2.0 */ @@ -384,7 +384,7 @@ dsc_slice_num = <0>; /* count of dsc slice */ data_lane = <4>; /* number of using data lane */ cmd_underrun_lp_ref = <4942>; /* for underrun detect at command mode*/ - vt_compensation = <0>; /* for underrun detect at video mode*/ + vt_compensation = <1>; /* for underrun detect at video mode*/ mres_en = <0>; mres_number = <3>; mres_width = <1440 1080 720>; -- 2.20.1