From f2713e8c2a34711ed820a3095a7c5f4a0c85df1c Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Tue, 28 Mar 2017 12:19:31 -0400 Subject: [PATCH] drm/amdgpu: refine the logic in amdgpu_need_post() MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit We check the mem config register to make sure it's been programmed by the vbios to determine if we need to post so we check for a non-0 value. However, when the asic comes out of reset, we may see all ones here, so check for that too. Reviewed-by: Christian König Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c index abb51bd77ca7..ae31744dac28 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c @@ -719,7 +719,7 @@ bool amdgpu_need_post(struct amdgpu_device *adev) /* then check MEM_SIZE, in case the crtcs are off */ reg = amdgpu_asic_get_config_memsize(adev); - if (reg) + if ((reg != 0) && (reg != 0xffffffff)) return false; return true; -- 2.20.1