From ec2790e9d72e87c90d9247430c3f08df1fce3c75 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Mon, 20 Jun 2016 11:58:09 +0300 Subject: [PATCH] i2c: designware-pci: clarify a comment for Merrifield There are more than 7 busses, but only 7 are user visible. Update comment accordingly. Acked-by: Jarkko Nikula Signed-off-by: Andy Shevchenko Signed-off-by: Wolfram Sang --- drivers/i2c/busses/i2c-designware-pcidrv.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/i2c/busses/i2c-designware-pcidrv.c b/drivers/i2c/busses/i2c-designware-pcidrv.c index b66c31acb184..96f8230cd2d3 100644 --- a/drivers/i2c/busses/i2c-designware-pcidrv.c +++ b/drivers/i2c/busses/i2c-designware-pcidrv.c @@ -125,10 +125,10 @@ static int mfld_setup(struct pci_dev *pdev, struct dw_pci_controller *c) static int mrfld_setup(struct pci_dev *pdev, struct dw_pci_controller *c) { /* - * On Intel Merrifield the i2c busses are enumerated [1..7]. So, we add - * 1 to shift the default range. Besides that the first PCI slot - * provides 4 functions, that's why we have to add 0 to the head slot - * and 4 to the tail one. + * On Intel Merrifield the user visible i2c busses are enumerated + * [1..7]. So, we add 1 to shift the default range. Besides that the + * first PCI slot provides 4 functions, that's why we have to add 0 to + * the first slot and 4 to the next one. */ switch (PCI_SLOT(pdev->devfn)) { case 8: -- 2.20.1