From ebf69cb8331d7336e4bcd442a2ca69bb61739a58 Mon Sep 17 00:00:00 2001 From: Daniel Vetter Date: Wed, 5 Dec 2012 09:52:14 +0100 Subject: [PATCH] drm/i915: fixup l3 parity sysfs access check When l3 parity support for Haswell was enabled in commit f27b92651d72e863c308ea5dca5615fc98e38ca6 Author: Ben Widawsky Date: Tue Jul 24 20:47:32 2012 -0700 drm/i915: Expand DPF support to Haswell no one noticed that the patch which introduced this macro commit e1ef7cc299839e68dae3f1843f62e52acda04538 Author: Ben Widawsky Date: Tue Jul 24 20:47:31 2012 -0700 drm/i915: Macro to determine DPF support missed one spot. Fix this. Cc: Ben Widawsky Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=57441 Reviewed-by: Ben Widawsky Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/i915_sysfs.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c index 3bf51d58319d..9462081b1e60 100644 --- a/drivers/gpu/drm/i915/i915_sysfs.c +++ b/drivers/gpu/drm/i915/i915_sysfs.c @@ -97,7 +97,7 @@ static struct attribute_group rc6_attr_group = { static int l3_access_valid(struct drm_device *dev, loff_t offset) { - if (!IS_IVYBRIDGE(dev)) + if (!HAS_L3_GPU_CACHE(dev)) return -EPERM; if (offset % 4 != 0) -- 2.20.1