From eb2cd8b72b08fe56998600aee8a5dff93f7be5a2 Mon Sep 17 00:00:00 2001 From: Vineet Gupta Date: Thu, 6 Aug 2015 19:11:06 +0530 Subject: [PATCH] ARC: ensure futex ops are atomic in !LLSC config W/o hardware assisted atomic r-m-w the best we can do is to disable preemption. Cc: David Hildenbrand Cc: Peter Zijlstra (Intel) Cc: Thomas Gleixner Cc: Michel Lespinasse Signed-off-by: Vineet Gupta --- arch/arc/include/asm/futex.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arc/include/asm/futex.h b/arch/arc/include/asm/futex.h index 0ea8bcc7b846..8f449982523b 100644 --- a/arch/arc/include/asm/futex.h +++ b/arch/arc/include/asm/futex.h @@ -87,6 +87,9 @@ static inline int futex_atomic_op_inuser(int encoded_op, u32 __user *uaddr) if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int))) return -EFAULT; +#ifndef CONFIG_ARC_HAS_LLSC + preempt_disable(); /* to guarantee atomic r-m-w of futex op */ +#endif pagefault_disable(); switch (op) { @@ -111,6 +114,9 @@ static inline int futex_atomic_op_inuser(int encoded_op, u32 __user *uaddr) } pagefault_enable(); +#ifndef CONFIG_ARC_HAS_LLSC + preempt_enable(); +#endif if (!ret) { switch (cmp) { @@ -153,6 +159,9 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr, u32 expval, if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32))) return -EFAULT; +#ifndef CONFIG_ARC_HAS_LLSC + preempt_disable(); /* to guarantee atomic r-m-w of futex op */ +#endif smp_mb(); __asm__ __volatile__( @@ -182,6 +191,9 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr, u32 expval, smp_mb(); +#ifndef CONFIG_ARC_HAS_LLSC + preempt_enable(); +#endif *uval = existval; return ret; } -- 2.20.1