From e301a08be4e4ad349b6195562197950d74c86e8a Mon Sep 17 00:00:00 2001 From: Jesper Nilsson Date: Fri, 2 Oct 2015 11:22:55 +0200 Subject: [PATCH] CRIS: Drop code related to obsolete or unused kconfigs Drop all code related to Kconfigs that don't exist. Fix one Kconfig where it was actually typo:ed (ETRAX_KGB_PORT2) Drop content related to CRIS v32 SoCs from etraxgpio.h headerfile, all use of GPIO for both ETRAX FS and ARTPEC-3 should now be through standard gpiolib instead. Signed-off-by: Jesper Nilsson --- arch/cris/arch-v10/kernel/head.S | 106 ----------------- arch/cris/arch-v10/mm/init.c | 14 +-- arch/cris/arch-v32/kernel/debugport.c | 2 - arch/cris/arch-v32/kernel/head.S | 4 - arch/cris/arch-v32/kernel/irq.c | 2 +- arch/cris/arch-v32/kernel/setup.c | 8 -- arch/cris/arch-v32/mach-fs/Kconfig | 19 --- arch/cris/boot/rescue/head_v10.S | 3 - arch/cris/include/asm/eshlibld.h | 3 +- arch/cris/include/uapi/asm/etraxgpio.h | 157 ------------------------- 10 files changed, 5 insertions(+), 313 deletions(-) diff --git a/arch/cris/arch-v10/kernel/head.S b/arch/cris/arch-v10/kernel/head.S index 4a146e1749c9..a4877a421756 100644 --- a/arch/cris/arch-v10/kernel/head.S +++ b/arch/cris/arch-v10/kernel/head.S @@ -354,63 +354,6 @@ no_command_line: blo 1b nop -#ifdef CONFIG_BLK_DEV_ETRAXIDE - ;; disable ATA before enabling it in genconfig below - moveq 0,$r0 - move.d $r0,[R_ATA_CTRL_DATA] - move.d $r0,[R_ATA_TRANSFER_CNT] - move.d $r0,[R_ATA_CONFIG] -#if 0 - move.d R_PORT_G_DATA, $r1 - move.d $r0, [$r1]; assert ATA bus-reset - nop - nop - nop - nop - nop - nop - move.d 0x08000000,$r0 - move.d $r0,[$r1] -#endif -#endif - -#ifdef CONFIG_JULIETTE - ;; configure external DMA channel 0 before enabling it in genconfig - - moveq 0,$r0 - move.d $r0,[R_EXT_DMA_0_ADDR] - ; cnt enable, word size, output, stop, size 0 - move.d IO_STATE (R_EXT_DMA_0_CMD, cnt, enable) \ - | IO_STATE (R_EXT_DMA_0_CMD, rqpol, ahigh) \ - | IO_STATE (R_EXT_DMA_0_CMD, apol, ahigh) \ - | IO_STATE (R_EXT_DMA_0_CMD, rq_ack, burst) \ - | IO_STATE (R_EXT_DMA_0_CMD, wid, word) \ - | IO_STATE (R_EXT_DMA_0_CMD, dir, output) \ - | IO_STATE (R_EXT_DMA_0_CMD, run, stop) \ - | IO_FIELD (R_EXT_DMA_0_CMD, trf_count, 0),$r0 - move.d $r0,[R_EXT_DMA_0_CMD] - - ;; reset dma4 and wait for completion - - moveq IO_STATE (R_DMA_CH4_CMD, cmd, reset),$r0 - move.b $r0,[R_DMA_CH4_CMD] -1: move.b [R_DMA_CH4_CMD],$r0 - and.b IO_MASK (R_DMA_CH4_CMD, cmd),$r0 - cmp.b IO_STATE (R_DMA_CH4_CMD, cmd, reset),$r0 - beq 1b - nop - - ;; reset dma5 and wait for completion - - moveq IO_STATE (R_DMA_CH5_CMD, cmd, reset),$r0 - move.b $r0,[R_DMA_CH5_CMD] -1: move.b [R_DMA_CH5_CMD],$r0 - and.b IO_MASK (R_DMA_CH5_CMD, cmd),$r0 - cmp.b IO_STATE (R_DMA_CH5_CMD, cmd, reset),$r0 - beq 1b - nop -#endif - ;; Etrax product HW genconfig setup moveq 0,$r0 @@ -447,21 +390,6 @@ no_command_line: | IO_STATE (R_GEN_CONFIG, dma9, usb),$r0 -#if defined(CONFIG_ETRAX_DEF_R_PORT_G0_DIR_OUT) - or.d IO_STATE (R_GEN_CONFIG, g0dir, out),$r0 -#endif - -#if defined(CONFIG_ETRAX_DEF_R_PORT_G8_15_DIR_OUT) - or.d IO_STATE (R_GEN_CONFIG, g8_15dir, out),$r0 -#endif -#if defined(CONFIG_ETRAX_DEF_R_PORT_G16_23_DIR_OUT) - or.d IO_STATE (R_GEN_CONFIG, g16_23dir, out),$r0 -#endif - -#if defined(CONFIG_ETRAX_DEF_R_PORT_G24_DIR_OUT) - or.d IO_STATE (R_GEN_CONFIG, g24dir, out),$r0 -#endif - move.d $r0,[genconfig_shadow] ; init a shadow register of R_GEN_CONFIG move.d $r0,[R_GEN_CONFIG] @@ -500,19 +428,9 @@ no_command_line: ;; including their shadow registers move.b CONFIG_ETRAX_DEF_R_PORT_PA_DIR,$r0 -#if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_PA7) - or.b IO_STATE (R_PORT_PA_DIR, dir7, output),$r0 -#endif move.b $r0,[port_pa_dir_shadow] move.b $r0,[R_PORT_PA_DIR] move.b CONFIG_ETRAX_DEF_R_PORT_PA_DATA,$r0 -#if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_PA7) -#if defined(CONFIG_BLUETOOTH_RESET_ACTIVE_HIGH) - and.b ~(1 << 7),$r0 -#else - or.b (1 << 7),$r0 -#endif -#endif move.b $r0,[port_pa_data_shadow] move.b $r0,[R_PORT_PA_DATA] @@ -520,19 +438,9 @@ no_command_line: move.b $r0,[port_pb_config_shadow] move.b $r0,[R_PORT_PB_CONFIG] move.b CONFIG_ETRAX_DEF_R_PORT_PB_DIR,$r0 -#if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_PB5) - or.b IO_STATE (R_PORT_PB_DIR, dir5, output),$r0 -#endif move.b $r0,[port_pb_dir_shadow] move.b $r0,[R_PORT_PB_DIR] move.b CONFIG_ETRAX_DEF_R_PORT_PB_DATA,$r0 -#if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_PB5) -#if defined(CONFIG_BLUETOOTH_RESET_ACTIVE_HIGH) - and.b ~(1 << 5),$r0 -#else - or.b (1 << 5),$r0 -#endif -#endif move.b $r0,[port_pb_data_shadow] move.b $r0,[R_PORT_PB_DATA] @@ -541,20 +449,6 @@ no_command_line: move.d $r0, [R_PORT_PB_I2C] moveq 0,$r0 -#if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_G10) -#if defined(CONFIG_BLUETOOTH_RESET_ACTIVE_HIGH) - and.d ~(1 << 10),$r0 -#else - or.d (1 << 10),$r0 -#endif -#endif -#if defined(CONFIG_BLUETOOTH) && defined(CONFIG_BLUETOOTH_RESET_G11) -#if defined(CONFIG_BLUETOOTH_RESET_ACTIVE_HIGH) - and.d ~(1 << 11),$r0 -#else - or.d (1 << 11),$r0 -#endif -#endif move.d $r0,[port_g_data_shadow] move.d $r0,[R_PORT_G_DATA] diff --git a/arch/cris/arch-v10/mm/init.c b/arch/cris/arch-v10/mm/init.c index e7f8066105aa..85e3f1b1f3ac 100644 --- a/arch/cris/arch-v10/mm/init.c +++ b/arch/cris/arch-v10/mm/init.c @@ -68,14 +68,10 @@ paging_init(void) *R_MMU_KSEG = ( IO_STATE(R_MMU_KSEG, seg_f, seg ) | /* bootrom */ IO_STATE(R_MMU_KSEG, seg_e, page ) | - IO_STATE(R_MMU_KSEG, seg_d, page ) | - IO_STATE(R_MMU_KSEG, seg_c, page ) | + IO_STATE(R_MMU_KSEG, seg_d, page ) | + IO_STATE(R_MMU_KSEG, seg_c, page ) | IO_STATE(R_MMU_KSEG, seg_b, seg ) | /* kernel reg area */ -#ifdef CONFIG_JULIETTE - IO_STATE(R_MMU_KSEG, seg_a, seg ) | /* ARTPEC etc. */ -#else IO_STATE(R_MMU_KSEG, seg_a, page ) | -#endif IO_STATE(R_MMU_KSEG, seg_9, seg ) | /* LED's on some boards */ IO_STATE(R_MMU_KSEG, seg_8, seg ) | /* CSE0/1, flash and I/O */ IO_STATE(R_MMU_KSEG, seg_7, page ) | /* kernel vmalloc area */ @@ -92,14 +88,10 @@ paging_init(void) IO_FIELD(R_MMU_KBASE_HI, base_d, 0x0 ) | IO_FIELD(R_MMU_KBASE_HI, base_c, 0x0 ) | IO_FIELD(R_MMU_KBASE_HI, base_b, 0xb ) | -#ifdef CONFIG_JULIETTE - IO_FIELD(R_MMU_KBASE_HI, base_a, 0xa ) | -#else IO_FIELD(R_MMU_KBASE_HI, base_a, 0x0 ) | -#endif IO_FIELD(R_MMU_KBASE_HI, base_9, 0x9 ) | IO_FIELD(R_MMU_KBASE_HI, base_8, 0x8 ) ); - + *R_MMU_KBASE_LO = ( IO_FIELD(R_MMU_KBASE_LO, base_7, 0x0 ) | IO_FIELD(R_MMU_KBASE_LO, base_6, 0x4 ) | IO_FIELD(R_MMU_KBASE_LO, base_5, 0x0 ) | diff --git a/arch/cris/arch-v32/kernel/debugport.c b/arch/cris/arch-v32/kernel/debugport.c index 02e33ebe51ec..d2f3f9c37102 100644 --- a/arch/cris/arch-v32/kernel/debugport.c +++ b/arch/cris/arch-v32/kernel/debugport.c @@ -77,8 +77,6 @@ static struct dbg_port *port = &ports[2]; #elif defined(CONFIG_ETRAX_DEBUG_PORT3) &ports[3]; -#elif defined(CONFIG_ETRAX_DEBUG_PORT4) - &ports[4]; #else NULL; #endif diff --git a/arch/cris/arch-v32/kernel/head.S b/arch/cris/arch-v32/kernel/head.S index 74a66e0e3777..ea6366800df7 100644 --- a/arch/cris/arch-v32/kernel/head.S +++ b/arch/cris/arch-v32/kernel/head.S @@ -292,11 +292,7 @@ _no_romfs_in_flash: ;; For cramfs, partition starts with magic and length. ;; For jffs2, a jhead is prepended which contains with magic and length. ;; The jhead is not part of the jffs2 partition however. -#ifndef CONFIG_ETRAXFS_SIM move.d __bss_start, $r0 -#else - move.d __end, $r0 -#endif move.d [$r0], $r1 cmp.d CRAMFS_MAGIC, $r1 ; cramfs magic? beq 2f ; yes, jump diff --git a/arch/cris/arch-v32/kernel/irq.c b/arch/cris/arch-v32/kernel/irq.c index b566a038d2a1..6de8db67cb09 100644 --- a/arch/cris/arch-v32/kernel/irq.c +++ b/arch/cris/arch-v32/kernel/irq.c @@ -37,7 +37,7 @@ #define IGNOREMASK (1 << (SER0_INTR_VECT - FIRST_IRQ)) #elif defined(CONFIG_ETRAX_KGDB_PORT1) #define IGNOREMASK (1 << (SER1_INTR_VECT - FIRST_IRQ)) -#elif defined(CONFIG_ETRAX_KGB_PORT2) +#elif defined(CONFIG_ETRAX_KGDB_PORT2) #define IGNOREMASK (1 << (SER2_INTR_VECT - FIRST_IRQ)) #elif defined(CONFIG_ETRAX_KGDB_PORT3) #define IGNOREMASK (1 << (SER3_INTR_VECT - FIRST_IRQ)) diff --git a/arch/cris/arch-v32/kernel/setup.c b/arch/cris/arch-v32/kernel/setup.c index cd1865d68b2e..fe50287aa928 100644 --- a/arch/cris/arch-v32/kernel/setup.c +++ b/arch/cris/arch-v32/kernel/setup.c @@ -128,10 +128,6 @@ static struct i2c_board_info __initdata i2c_info[] = { {I2C_BOARD_INFO("tmp100", 0x4E)}, #ifdef CONFIG_RTC_DRV_PCF8563 {I2C_BOARD_INFO("pcf8563", 0x51)}, -#endif -#ifdef CONFIG_ETRAX_VIRTUAL_GPIO - {I2C_BOARD_INFO("vgpio", 0x20)}, - {I2C_BOARD_INFO("vgpio", 0x21)}, #endif {I2C_BOARD_INFO("pca9536", 0x41)}, {I2C_BOARD_INFO("fnp300", 0x40)}, @@ -146,10 +142,6 @@ static struct i2c_board_info __initdata i2c_info2[] = { {I2C_BOARD_INFO("tmp100", 0x4C)}, {I2C_BOARD_INFO("tmp100", 0x4D)}, {I2C_BOARD_INFO("tmp100", 0x4E)}, -#ifdef CONFIG_ETRAX_VIRTUAL_GPIO - {I2C_BOARD_INFO("vgpio", 0x20)}, - {I2C_BOARD_INFO("vgpio", 0x21)}, -#endif {I2C_BOARD_INFO("pca9536", 0x41)}, {I2C_BOARD_INFO("fnp300", 0x40)}, {I2C_BOARD_INFO("fnp300", 0x42)}, diff --git a/arch/cris/arch-v32/mach-fs/Kconfig b/arch/cris/arch-v32/mach-fs/Kconfig index 774de82abef6..7d1ab972bc0f 100644 --- a/arch/cris/arch-v32/mach-fs/Kconfig +++ b/arch/cris/arch-v32/mach-fs/Kconfig @@ -192,25 +192,6 @@ config ETRAX_DEF_GIO_PE_OUT Configures the initial data for the general port E bits. Most products should use 00000 here. -config ETRAX_DEF_GIO_PV_OE - hex "GIO_PV_OE" - depends on ETRAX_VIRTUAL_GPIO - default "0000" - help - Configures the direction of virtual general port V bits. 1 is out, - 0 is in. This is often totally different depending on the product - used. These bits are used for all kinds of stuff. If you don't know - what to use, it is always safe to put all as inputs, although - floating inputs isn't good. - -config ETRAX_DEF_GIO_PV_OUT - hex "GIO_PV_OUT" - depends on ETRAX_VIRTUAL_GPIO - default "0000" - help - Configures the initial data for the virtual general port V bits. - Most products should use 0000 here. - endmenu endif diff --git a/arch/cris/boot/rescue/head_v10.S b/arch/cris/boot/rescue/head_v10.S index af55df0994b3..1c05492f3eb2 100644 --- a/arch/cris/boot/rescue/head_v10.S +++ b/arch/cris/boot/rescue/head_v10.S @@ -281,9 +281,6 @@ wait_ser: #ifdef CONFIG_ETRAX_PB_LEDS move.b $r2, [R_PORT_PB_DATA] #endif -#ifdef CONFIG_ETRAX_90000000_LEDS - move.b $r2, [0x90000000] -#endif #endif ;; check if we got something on the serial port diff --git a/arch/cris/include/asm/eshlibld.h b/arch/cris/include/asm/eshlibld.h index 10ce36cf79a9..70aa448256b0 100644 --- a/arch/cris/include/asm/eshlibld.h +++ b/arch/cris/include/asm/eshlibld.h @@ -45,8 +45,7 @@ assumed that we want to share code when debugging (exposes more trouble). */ #ifndef SHARE_LIB_CORE -# if (defined(__KERNEL__) || !defined(RELOC_DEBUG)) \ - && !defined(CONFIG_SHARE_SHLIB_CORE) +# if (defined(__KERNEL__) || !defined(RELOC_DEBUG)) # define SHARE_LIB_CORE 0 # else # define SHARE_LIB_CORE 1 diff --git a/arch/cris/include/uapi/asm/etraxgpio.h b/arch/cris/include/uapi/asm/etraxgpio.h index 461c089db765..c6e7d57c8b24 100644 --- a/arch/cris/include/uapi/asm/etraxgpio.h +++ b/arch/cris/include/uapi/asm/etraxgpio.h @@ -11,26 +11,6 @@ * g1-g7 and g25-g31 is both input and outputs but on different pins * Also note that some bits change pins depending on what interfaces * are enabled. - * - * For ETRAX FS (CONFIG_ETRAXFS): - * /dev/gpioa minor 0, 8 bit GPIO, each bit can change direction - * /dev/gpiob minor 1, 18 bit GPIO, each bit can change direction - * /dev/gpioc minor 3, 18 bit GPIO, each bit can change direction - * /dev/gpiod minor 4, 18 bit GPIO, each bit can change direction - * /dev/gpioe minor 5, 18 bit GPIO, each bit can change direction - * /dev/leds minor 2, Access to leds depending on kernelconfig - * - * For ARTPEC-3 (CONFIG_CRIS_MACH_ARTPEC3): - * /dev/gpioa minor 0, 32 bit GPIO, each bit can change direction - * /dev/gpiob minor 1, 32 bit GPIO, each bit can change direction - * /dev/gpioc minor 3, 16 bit GPIO, each bit can change direction - * /dev/gpiod minor 4, 32 bit GPIO, input only - * /dev/leds minor 2, Access to leds depending on kernelconfig - * /dev/pwm0 minor 16, PWM channel 0 on PA30 - * /dev/pwm1 minor 17, PWM channel 1 on PA31 - * /dev/pwm2 minor 18, PWM channel 2 on PB26 - * /dev/ppwm minor 19, PPWM channel - * */ #ifndef _ASM_ETRAXGPIO_H #define _ASM_ETRAXGPIO_H @@ -40,52 +20,12 @@ #define ETRAXGPIO_IOCTYPE 43 /* etraxgpio _IOC_TYPE, bits 8 to 15 in ioctl cmd */ -#ifdef CONFIG_ETRAX_ARCH_V10 #define GPIO_MINOR_A 0 #define GPIO_MINOR_B 1 #define GPIO_MINOR_LEDS 2 #define GPIO_MINOR_G 3 #define GPIO_MINOR_LAST 3 #define GPIO_MINOR_LAST_REAL GPIO_MINOR_LAST -#endif - -#ifdef CONFIG_ETRAXFS -#define GPIO_MINOR_A 0 -#define GPIO_MINOR_B 1 -#define GPIO_MINOR_LEDS 2 -#define GPIO_MINOR_C 3 -#define GPIO_MINOR_D 4 -#define GPIO_MINOR_E 5 -#ifdef CONFIG_ETRAX_VIRTUAL_GPIO -#define GPIO_MINOR_V 6 -#define GPIO_MINOR_LAST 6 -#else -#define GPIO_MINOR_LAST 5 -#endif -#define GPIO_MINOR_LAST_REAL GPIO_MINOR_LAST -#endif - -#ifdef CONFIG_CRIS_MACH_ARTPEC3 -#define GPIO_MINOR_A 0 -#define GPIO_MINOR_B 1 -#define GPIO_MINOR_LEDS 2 -#define GPIO_MINOR_C 3 -#define GPIO_MINOR_D 4 -#ifdef CONFIG_ETRAX_VIRTUAL_GPIO -#define GPIO_MINOR_V 6 -#define GPIO_MINOR_LAST 6 -#else -#define GPIO_MINOR_LAST 4 -#endif -#define GPIO_MINOR_FIRST_PWM 16 -#define GPIO_MINOR_PWM0 (GPIO_MINOR_FIRST_PWM+0) -#define GPIO_MINOR_PWM1 (GPIO_MINOR_FIRST_PWM+1) -#define GPIO_MINOR_PWM2 (GPIO_MINOR_FIRST_PWM+2) -#define GPIO_MINOR_PPWM (GPIO_MINOR_FIRST_PWM+3) -#define GPIO_MINOR_LAST_PWM GPIO_MINOR_PPWM -#define GPIO_MINOR_LAST_REAL GPIO_MINOR_LAST_PWM -#endif - /* supported ioctl _IOC_NR's */ @@ -139,101 +79,4 @@ #define IO_SETGET_OUTPUT 0x13 /* bits set in *arg is set to output, */ /* *arg updated with current output pins. */ -/* The following ioctl's are applicable to the PWM channels only */ - -#define IO_PWM_SET_MODE 0x20 - -enum io_pwm_mode { - PWM_OFF = 0, /* disabled, deallocated */ - PWM_STANDARD = 1, /* 390 kHz, duty cycle 0..255/256 */ - PWM_FAST = 2, /* variable freq, w/ 10ns active pulse len */ - PWM_VARFREQ = 3, /* individually configurable high/low periods */ - PWM_SOFT = 4 /* software generated */ -}; - -struct io_pwm_set_mode { - enum io_pwm_mode mode; -}; - -/* Only for mode PWM_VARFREQ. Period lo/high set in increments of 10ns - * from 10ns (value = 0) to 81920ns (value = 8191) - * (Resulting frequencies range from 50 MHz (10ns + 10ns) down to - * 6.1 kHz (81920ns + 81920ns) at 50% duty cycle, to 12.2 kHz at min/max duty - * cycle (81920 + 10ns or 10ns + 81920ns, respectively).) - */ -#define IO_PWM_SET_PERIOD 0x21 - -struct io_pwm_set_period { - unsigned int lo; /* 0..8191 */ - unsigned int hi; /* 0..8191 */ -}; - -/* Only for modes PWM_STANDARD and PWM_FAST. - * For PWM_STANDARD, set duty cycle of 390 kHz PWM output signal, from - * 0 (value = 0) to 255/256 (value = 255). - * For PWM_FAST, set duty cycle of PWM output signal from - * 0% (value = 0) to 100% (value = 255). Output signal in this mode - * is a 10ns pulse surrounded by a high or low level depending on duty - * cycle (except for 0% and 100% which result in a constant output). - * Resulting output frequency varies from 50 MHz at 50% duty cycle, - * down to 390 kHz at min/max duty cycle. - */ -#define IO_PWM_SET_DUTY 0x22 - -struct io_pwm_set_duty { - int duty; /* 0..255 */ -}; - -/* Returns information about the latest PWM pulse. - * lo: Length of the latest low period, in units of 10ns. - * hi: Length of the latest high period, in units of 10ns. - * cnt: Time since last detected edge, in units of 10ns. - * - * The input source to PWM is decied by IO_PWM_SET_INPUT_SRC. - * - * NOTE: All PWM devices is connected to the same input source. - */ -#define IO_PWM_GET_PERIOD 0x23 - -struct io_pwm_get_period { - unsigned int lo; - unsigned int hi; - unsigned int cnt; -}; - -/* Sets the input source for the PWM input. For the src value see the - * register description for gio:rw_pwm_in_cfg. - * - * NOTE: All PWM devices is connected to the same input source. - */ -#define IO_PWM_SET_INPUT_SRC 0x24 -struct io_pwm_set_input_src { - unsigned int src; /* 0..7 */ -}; - -/* Sets the duty cycles in steps of 1/256, 0 = 0%, 255 = 100% duty cycle */ -#define IO_PPWM_SET_DUTY 0x25 - -struct io_ppwm_set_duty { - int duty; /* 0..255 */ -}; - -/* Configuraton struct for the IO_PWMCLK_SET_CONFIG ioctl to configure - * PWM capable gpio pins: - */ -#define IO_PWMCLK_SETGET_CONFIG 0x26 -struct gpio_pwmclk_conf { - unsigned int gpiopin; /* The pin number based on the opened device */ - unsigned int baseclk; /* The base clock to use, or sw will select one close*/ - unsigned int low; /* The number of low periods of the baseclk */ - unsigned int high; /* The number of high periods of the baseclk */ -}; - -/* Examples: - * To get a symmetric 12 MHz clock without knowing anything about the hardware: - * baseclk = 12000000, low = 0, high = 0 - * To just get info of current setting: - * baseclk = 0, low = 0, high = 0, the values will be updated by driver. - */ - #endif -- 2.20.1