From e0dc09ff9a28f37441c5e92a14de6abda8db49d6 Mon Sep 17 00:00:00 2001 From: Timur Tabi Date: Wed, 13 Oct 2010 14:19:36 -0500 Subject: [PATCH] powerpc/watchdog: Make default timeout for Book-E watchdog a Kconfig option The PowerPC Book-E watchdog driver (booke_wdt.c) defines a default timeout value in the code based on whether it's a Freescale Book-E part of not. Instead of having hard-coded values in the driver, make it a Kconfig option. As newer chips gets faster, the current default values become less appropriate, since the timeout sometimes occurs before the kernel finishes booting. Making the value a Kconfig option allows BSPs to configure a new value without requiring the wdt_period command-line parameter to be set. Signed-off-by: Timur Tabi Signed-off-by: Kumar Gala --- drivers/watchdog/Kconfig | 17 +++++++++++++++++ drivers/watchdog/booke_wdt.c | 8 +------- 2 files changed, 18 insertions(+), 7 deletions(-) diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index a6812eb31fa1..c356146bd712 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -966,6 +966,23 @@ config BOOKE_WDT Please see Documentation/watchdog/watchdog-api.txt for more information. +config BOOKE_WDT_DEFAULT_TIMEOUT + int "PowerPC Book-E Watchdog Timer Default Timeout" + depends on BOOKE_WDT + default 38 if FSL_BOOKE + range 0 63 if FSL_BOOKE + default 3 if !FSL_BOOKE + range 0 3 if !FSL_BOOKE + help + Select the default watchdog timer period to be used by the PowerPC + Book-E watchdog driver. A watchdog "event" occurs when the bit + position represented by this number transitions from zero to one. + + For Freescale Book-E processors, this is a number between 0 and 63. + For other Book-E processors, this is a number between 0 and 3. + + The value can be overidden by the wdt_period command-line parameter. + # PPC64 Architecture config WATCHDOG_RTAS diff --git a/drivers/watchdog/booke_wdt.c b/drivers/watchdog/booke_wdt.c index a9899981fd97..d11ffb091b0d 100644 --- a/drivers/watchdog/booke_wdt.c +++ b/drivers/watchdog/booke_wdt.c @@ -33,14 +33,8 @@ * occur, and the final time the board will reset. */ -#ifdef CONFIG_FSL_BOOKE -#define WDT_PERIOD_DEFAULT 38 /* Ex. wdt_period=28 bus=333Mhz,reset=~40sec */ -#else -#define WDT_PERIOD_DEFAULT 3 /* Refer to the PPC40x and PPC4xx manuals */ -#endif /* for timing information */ - u32 booke_wdt_enabled; -u32 booke_wdt_period = WDT_PERIOD_DEFAULT; +u32 booke_wdt_period = CONFIG_BOOKE_WDT_DEFAULT_TIMEOUT; #ifdef CONFIG_FSL_BOOKE #define WDTP(x) ((((x)&0x3)<<30)|(((x)&0x3c)<<15)) -- 2.20.1