From de0b9cba9d87126271057ef644992d751803a130 Mon Sep 17 00:00:00 2001 From: Sanghoon Lee Date: Tue, 5 Sep 2017 22:55:55 +0900 Subject: [PATCH] [COMMON] spi: s3c64xx: Add Rx channel disalbe after fifo full This patch is for Camera SPI Channel. There sould be Rx channel off sequence between Rx Fifo Full and Read data from Rx FIFO. Change-Id: I67acce6fd1ad283dc48330644a07221d2108d0cb Signed-off-by: Sanghoon Lee --- drivers/spi/spi-s3c64xx.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c index 695d37e66e56..27331bf7aebf 100644 --- a/drivers/spi/spi-s3c64xx.c +++ b/drivers/spi/spi-s3c64xx.c @@ -653,6 +653,12 @@ static int wait_for_xfer(struct s3c64xx_spi_driver_data *sdd, do { status = readl(regs + S3C64XX_SPI_STATUS); } while (RX_FIFO_LVL(status, sdd) < xfer->len && --val); + + if (master->bus_num == 0) { + chcfg = readl(regs + S3C64XX_SPI_CH_CFG); + chcfg &= ~S3C64XX_SPI_CH_RXCH_ON; + writel(chcfg, regs + S3C64XX_SPI_CH_CFG); + } } if (!val) -- 2.20.1