From dc0366bf3cd35e4be89f715ff834a06c590fff7a Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Wed, 1 Aug 2007 19:42:37 +0100 Subject: [PATCH] [MIPS] SMTC: Fix secondary VPE interrupt mask initialization. Signed-off-by: Ralf Baechle --- arch/mips/mips-boards/malta/malta_smtc.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/arch/mips/mips-boards/malta/malta_smtc.c b/arch/mips/mips-boards/malta/malta_smtc.c index 0fb4c269901c..ea8f3bb8ed81 100644 --- a/arch/mips/mips-boards/malta/malta_smtc.c +++ b/arch/mips/mips-boards/malta/malta_smtc.c @@ -42,10 +42,11 @@ void prom_init_secondary(void) myvpe = read_c0_tcbind() & TCBIND_CURVPE; if (myvpe != 0) { /* Ideally, this should be done only once per VPE, but... */ - clear_c0_status(STATUSF_IP2); - set_c0_status(STATUSF_IP0 | STATUSF_IP1 | STATUSF_IP3 - | STATUSF_IP4 | STATUSF_IP5 | STATUSF_IP6 - | STATUSF_IP7); + clear_c0_status(ST0_IM); + set_c0_status((0x100 << cp0_compare_irq) + | (0x100 << MIPS_CPU_IPI_IRQ)); + if (cp0_perfcount_irq >= 0) + set_c0_status(0x100 << cp0_perfcount_irq); } smtc_init_secondary(); -- 2.20.1