From d9abae3ca5e8fa30fe5074aafd52a5bdfb8b2ed8 Mon Sep 17 00:00:00 2001 From: Caesar Wang Date: Tue, 2 Feb 2016 11:40:50 +0800 Subject: [PATCH] ARM: dts: rockchip: add vop device node for rk3036 The rk3036 support two overlay plane and one hwc plane, it supports IOMMU, and its IOMMU same as rk3288's. Signed-off-by: Caesar Wang Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3036.dtsi | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi index d0f4bb7e1e50..4932abf2a784 100644 --- a/arch/arm/boot/dts/rk3036.dtsi +++ b/arch/arm/boot/dts/rk3036.dtsi @@ -119,6 +119,11 @@ interrupt-affinity = <&cpu0>, <&cpu1>; }; + display-subsystem { + compatible = "rockchip,display-subsystem"; + ports = <&vop_out>; + }; + timer { compatible = "arm,armv7-timer"; arm,cpu-registers-not-fw-configured; @@ -149,6 +154,32 @@ }; }; + vop: vop@10118000 { + compatible = "rockchip,rk3036-vop"; + reg = <0x10118000 0x19c>; + interrupts = ; + clocks = <&cru ACLK_LCDC>, <&cru SCLK_LCDC>, <&cru HCLK_LCDC>; + clock-names = "aclk_vop", "dclk_vop", "hclk_vop"; + resets = <&cru SRST_LCDC1_A>, <&cru SRST_LCDC1_H>, <&cru SRST_LCDC1_D>; + reset-names = "axi", "ahb", "dclk"; + iommus = <&vop_mmu>; + status = "disabled"; + + vop_out: port { + #address-cells = <1>; + #size-cells = <0>; + }; + }; + + vop_mmu: iommu@10118300 { + compatible = "rockchip,iommu"; + reg = <0x10118300 0x100>; + interrupts = ; + interrupt-names = "vop_mmu"; + #iommu-cells = <0>; + status = "disabled"; + }; + gic: interrupt-controller@10139000 { compatible = "arm,gic-400"; interrupt-controller; -- 2.20.1