From d7927e19167680053f282fb4007e81c244ebf465 Mon Sep 17 00:00:00 2001 From: Paulius Zaleckas Date: Fri, 14 Nov 2008 11:01:39 +0100 Subject: [PATCH] patch-mxc-fiq Drivers which are going to use it will have to select it and use mxc_set_irq_fiq() to set FIQ mode for this interrupt. Signed-off-by: Paulius Zaleckas Signed-off-by: Sascha Hauer --- arch/arm/plat-mxc/include/mach/irqs.h | 5 +++++ arch/arm/plat-mxc/irq.c | 29 +++++++++++++++++++++++++++ 2 files changed, 34 insertions(+) diff --git a/arch/arm/plat-mxc/include/mach/irqs.h b/arch/arm/plat-mxc/include/mach/irqs.h index b55bba35e18a..b8ac91608a4f 100644 --- a/arch/arm/plat-mxc/include/mach/irqs.h +++ b/arch/arm/plat-mxc/include/mach/irqs.h @@ -14,4 +14,9 @@ #include extern void imx_irq_set_priority(unsigned char irq, unsigned char prio); +/* all normal IRQs can be FIQs */ +#define FIQ_START 0 +/* switch betwean IRQ and FIQ */ +extern int mxc_set_irq_fiq(unsigned int irq, unsigned int type); + #endif /* __ASM_ARCH_MXC_IRQS_H__ */ diff --git a/arch/arm/plat-mxc/irq.c b/arch/arm/plat-mxc/irq.c index d862c9e5f8db..dd7021b19834 100644 --- a/arch/arm/plat-mxc/irq.c +++ b/arch/arm/plat-mxc/irq.c @@ -17,9 +17,11 @@ * MA 02110-1301, USA. */ +#include #include #include #include +#include #define AVIC_BASE IO_ADDRESS(AVIC_BASE_ADDR) #define AVIC_INTCNTL (AVIC_BASE + 0x00) /* int control reg */ @@ -65,6 +67,28 @@ void imx_irq_set_priority(unsigned char irq, unsigned char prio) EXPORT_SYMBOL(imx_irq_set_priority); #endif +#ifdef CONFIG_FIQ +int mxc_set_irq_fiq(unsigned int irq, unsigned int type) +{ + unsigned int irqt; + + if (irq >= MXC_MAX_INT_LINES) + return -EINVAL; + + if (irq < MXC_MAX_INT_LINES / 2) { + irqt = __raw_readl(AVIC_INTTYPEL) & ~(1 << irq); + __raw_writel(irqt | (!!type << irq), AVIC_INTTYPEL); + } else { + irq -= MXC_MAX_INT_LINES / 2; + irqt = __raw_readl(AVIC_INTTYPEH) & ~(1 << irq); + __raw_writel(irqt | (!!type << irq), AVIC_INTTYPEH); + } + + return 0; +} +EXPORT_SYMBOL(mxc_set_irq_fiq); +#endif /* CONFIG_FIQ */ + /* Disable interrupt number "irq" in the AVIC */ static void mxc_mask_irq(unsigned int irq) { @@ -119,5 +143,10 @@ void __init mxc_init_irq(void) /* init architectures chained interrupt handler */ mxc_register_gpios(); +#ifdef CONFIG_FIQ + /* Initialize FIQ */ + init_FIQ(); +#endif + printk(KERN_INFO "MXC IRQ initialized\n"); } -- 2.20.1