From d650484649643e5f18c9ff61f4ca1fc57fb61fb1 Mon Sep 17 00:00:00 2001 From: Jayachandran C Date: Wed, 31 Oct 2012 12:01:29 +0000 Subject: [PATCH] MIPS: Netlogic: select MIPSR2 for XLP This allows us to use the r2 optimized code from kernel headers while compilation. Disable PGD_C0_CONTEXT option for XLP, which does not work. Signed-off-by: Jayachandran C Patchwork: http://patchwork.linux-mips.org/patch/4456 Signed-off-by: John Crispin --- arch/mips/Kconfig | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index a4919b0932ec..83980a07dc89 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -1542,6 +1542,7 @@ config CPU_XLP select WEAK_ORDERING select WEAK_REORDERING_BEYOND_LLSC select CPU_HAS_PREFETCH + select CPU_MIPSR2 help Netlogic Microsystems XLP processors. endchoice @@ -1755,7 +1756,7 @@ config CPU_SUPPORTS_UNCACHED_ACCELERATED bool config MIPS_PGD_C0_CONTEXT bool - default y if 64BIT && CPU_MIPSR2 + default y if 64BIT && CPU_MIPSR2 && !CPU_XLP # # Set to y for ptrace access to watch registers. -- 2.20.1