From cfc2f2637ab7c8db29ec408cc1504f572cff6694 Mon Sep 17 00:00:00 2001
From: Ben Skeggs <bskeggs@redhat.com>
Date: Fri, 11 Oct 2013 14:28:04 +1000
Subject: [PATCH] drm/nouveau/mc: msi rearm write via subdev, not device
This way we can catch it with debugging on for PMC subdev.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
---
drivers/gpu/drm/nouveau/core/subdev/mc/base.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/core/subdev/mc/base.c b/drivers/gpu/drm/nouveau/core/subdev/mc/base.c
index d8bb48f54c16..be5bdeef50e6 100644
--- a/drivers/gpu/drm/nouveau/core/subdev/mc/base.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/mc/base.c
@@ -47,7 +47,7 @@ nouveau_mc_intr(int irq, void *arg)
}
if (pmc->use_msi)
- nv_wr08(pmc->base.base.parent, 0x00088068, 0xff);
+ nv_wr08(pmc, 0x088068, 0xff);
if (intr) {
nv_error(pmc, "unknown intr 0x%08x\n", stat);
@@ -115,7 +115,7 @@ nouveau_mc_create_(struct nouveau_object *parent, struct nouveau_object *engine,
pmc->use_msi = pci_enable_msi(device->pdev) == 0;
if (pmc->use_msi) {
nv_info(pmc, "MSI interrupts enabled\n");
- nv_wr08(device, 0x00088068, 0xff);
+ nv_wr08(pmc, 0x088068, 0xff);
}
}
break;
--
2.20.1