From ce38cc79964687d3c7e92663bc040552416fca27 Mon Sep 17 00:00:00 2001 From: Yinghai Lu Date: Sat, 21 Jun 2008 01:14:27 -0700 Subject: [PATCH] x86: clean up init_amd() 1. move out calling of check_enable_amd_mmconf_dmi out of setup_64.c put it into init_amd(), so don't need to make extra dmi check for system with other cpus. 2. 15 --> 0xf Signed-off-by: Yinghai Lu Signed-off-by: Ingo Molnar --- arch/x86/kernel/cpu/amd_64.c | 22 ++++++++++++++-------- arch/x86/kernel/setup_64.c | 4 ---- 2 files changed, 14 insertions(+), 12 deletions(-) diff --git a/arch/x86/kernel/cpu/amd_64.c b/arch/x86/kernel/cpu/amd_64.c index 30b7557c9641..958526d6a74a 100644 --- a/arch/x86/kernel/cpu/amd_64.c +++ b/arch/x86/kernel/cpu/amd_64.c @@ -131,7 +131,7 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c) * Errata 63 for SH-B3 steppings * Errata 122 for all steppings (F+ have it disabled by default) */ - if (c->x86 == 15) { + if (c->x86 == 0xf) { rdmsrl(MSR_K8_HWCR, value); value |= 1 << 6; wrmsrl(MSR_K8_HWCR, value); @@ -143,10 +143,11 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c) clear_cpu_cap(c, 0*32+31); /* On C+ stepping K8 rep microcode works well for copy/memset */ - level = cpuid_eax(1); - if (c->x86 == 15 && ((level >= 0x0f48 && level < 0x0f50) || - level >= 0x0f58)) - set_cpu_cap(c, X86_FEATURE_REP_GOOD); + if (c->x86 == 0xf) { + level = cpuid_eax(1); + if((level >= 0x0f48 && level < 0x0f50) || level >= 0x0f58) + set_cpu_cap(c, X86_FEATURE_REP_GOOD); + } if (c->x86 == 0x10 || c->x86 == 0x11) set_cpu_cap(c, X86_FEATURE_REP_GOOD); @@ -157,7 +158,7 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c) level = get_model_name(c); if (!level) { switch (c->x86) { - case 15: + case 0xf: /* Should distinguish Models here, but this is only a fallback anyways. */ strcpy(c->x86_model_id, "Hammer"); @@ -176,14 +177,19 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c) else num_cache_leaves = 3; - if (c->x86 == 0xf || c->x86 == 0x10 || c->x86 == 0x11) + if (c->x86 >= 0xf && c->x86 <= 0x11) set_cpu_cap(c, X86_FEATURE_K8); /* MFENCE stops RDTSC speculation */ set_cpu_cap(c, X86_FEATURE_MFENCE_RDTSC); - if (c->x86 == 0x10) + if (c->x86 == 0x10) { + /* do this for boot cpu */ + if (c == &boot_cpu_data) + check_enable_amd_mmconf_dmi(); + fam10h_check_enable_mmcfg(); + } if (c == &boot_cpu_data && c->x86 >= 0xf && c->x86 <= 0x11) { unsigned long long tseg; diff --git a/arch/x86/kernel/setup_64.c b/arch/x86/kernel/setup_64.c index 175c696ec536..c94464ab04ba 100644 --- a/arch/x86/kernel/setup_64.c +++ b/arch/x86/kernel/setup_64.c @@ -72,7 +72,6 @@ #include #include #include -#include #include #ifdef CONFIG_PARAVIRT @@ -474,9 +473,6 @@ void __init setup_arch(char **cmdline_p) conswitchp = &dummy_con; #endif #endif - - /* do this before identify_cpu for boot cpu */ - check_enable_amd_mmconf_dmi(); } struct cpu_dev *cpu_devs[X86_VENDOR_NUM] = {}; -- 2.20.1