From bc4e03fbb431f0179a4c11608a9517dcf1dd631e Mon Sep 17 00:00:00 2001 From: Jiyu Yang Date: Fri, 12 Jul 2019 16:57:49 +0800 Subject: [PATCH] gpu: s912 update thermal [2/2] PD#SWPL-11152 Problem: no thermal control device node Solution: enable thermal Verify: q201 Change-Id: I0ff3b028aa9d3cb8418d7b4f567ec639f37b3059 Signed-off-by: Jiyu Yang --- .../midgard/platform/devicetree/platform_gx.c | 29 ++++++++++++------- 1 file changed, 19 insertions(+), 10 deletions(-) diff --git a/t83x/kernel/drivers/gpu/arm/midgard/platform/devicetree/platform_gx.c b/t83x/kernel/drivers/gpu/arm/midgard/platform/devicetree/platform_gx.c index ac49caa..d0353f6 100755 --- a/t83x/kernel/drivers/gpu/arm/midgard/platform/devicetree/platform_gx.c +++ b/t83x/kernel/drivers/gpu/arm/midgard/platform/devicetree/platform_gx.c @@ -28,11 +28,19 @@ #include #endif #include +#ifdef CONFIG_GPU_THERMAL +#include +#include +#ifdef CONFIG_DEVFREQ_THERMAL +#include +#endif +#endif #ifdef CONFIG_AMLOGIC_GPU_THERMAL #include #include -//#include -#include +#ifdef CONFIG_DEVFREQ_THERMAL +#include +#endif #endif #include "mali_scaling.h" @@ -84,15 +92,16 @@ int get_mali_freq_level(int freq) return level; mali_freq_num = mali_plat_data.dvfs_table_size - 1; - if (freq <= mali_plat_data.clk_sample[0]) + if (freq < mali_plat_data.clk_sample[0]) level = mali_freq_num-1; else if (freq >= mali_plat_data.clk_sample[mali_freq_num - 1]) level = 0; else { for (i=0; i= mali_plat_data.clk_sample[i] && freq <= mali_plat_data.clk_sample[i + 1]) { + if (freq >= mali_plat_data.clk_sample[i] && freq < mali_plat_data.clk_sample[i + 1]) { level = i; level = mali_freq_num-level - 1; + break; } } } @@ -109,7 +118,7 @@ int get_gpu_max_clk_level(void) return mali_plat_data.cfg_clock; } -#ifdef CONFIG_AMLOGIC_GPU_THERMAL +#if defined(CONFIG_AMLOGIC_GPU_THERMAL) || defined(CONFIG_GPU_THERMAL) static void set_limit_mali_freq(u32 idx) { if (mali_plat_data.limit_on == 0) @@ -141,7 +150,7 @@ static u32 get_mali_utilization(void) #endif #endif -#ifdef CONFIG_AMLOGIC_GPU_THERMAL +#if defined(CONFIG_AMLOGIC_GPU_THERMAL) || defined(CONFIG_GPU_THERMAL) static u32 set_limit_pp_num(u32 num) { u32 ret = -1; @@ -204,7 +213,7 @@ int mali_meson_uninit(struct platform_device* ptr_plt_dev) void mali_post_init(void) { -#ifdef CONFIG_AMLOGIC_GPU_THERMAL +#if defined(CONFIG_AMLOGIC_GPU_THERMAL) || defined(CONFIG_GPU_THERMAL) int err; struct gpufreq_cooling_device *gcdev = NULL; struct gpucore_cooling_device *gccdev = NULL; @@ -226,8 +235,8 @@ void mali_post_init(void) gcdev->get_online_pp = mali_get_online_pp; #endif err = gpufreq_cooling_register(gcdev); -#ifdef CONFIG_DEVFREQ_THERMAL - meson_gcooldev_min_update(gcdev->cool_dev); +#if defined(CONFIG_AMLOGIC_GPU_THERMAL) || defined(CONFIG_GPU_THERMAL) + aml_thermal_min_update(gcdev->cool_dev); #endif if (err < 0) printk("register GPU cooling error\n"); @@ -244,7 +253,7 @@ void mali_post_init(void) gccdev->set_max_pp_num=set_limit_pp_num; err = (int)gpucore_cooling_register(gccdev); #ifdef CONFIG_DEVFREQ_THERMAL - meson_gcooldev_min_update(gccdev->cool_dev); + aml_thermal_min_update(gccdev->cool_dev); #endif if (err < 0) printk("register GPU cooling error\n"); -- 2.20.1