From baa40e48d9069c6ec3ac4739f47e2e7560a022d3 Mon Sep 17 00:00:00 2001 From: Manu Abraham Date: Fri, 5 Oct 2007 09:04:32 -0300 Subject: [PATCH] V4L/DVB (9413): Bug: Set Auxilliary Clock Register correctly Signed-off-by: Manu Abraham Signed-off-by: Mauro Carvalho Chehab --- drivers/media/dvb/frontends/stb0899_drv.c | 6 ++++-- drivers/media/dvb/frontends/stb0899_reg.h | 9 +++++++++ 2 files changed, 13 insertions(+), 2 deletions(-) diff --git a/drivers/media/dvb/frontends/stb0899_drv.c b/drivers/media/dvb/frontends/stb0899_drv.c index 80791006d168..fe298654b34b 100644 --- a/drivers/media/dvb/frontends/stb0899_drv.c +++ b/drivers/media/dvb/frontends/stb0899_drv.c @@ -1145,7 +1145,7 @@ static int stb0899_set_tone(struct dvb_frontend *fe, fe_sec_tone_mode_t tone) struct stb0899_state *state = fe->demodulator_priv; struct stb0899_internal *internal = &state->internal; - u8 div; + u8 div, reg; /* wait for diseqc idle */ if (stb0899_wait_diseqc_txidle(state, 100) < 0) @@ -1156,7 +1156,9 @@ static int stb0899_set_tone(struct dvb_frontend *fe, fe_sec_tone_mode_t tone) div = (internal->master_clk / 100) / 5632; div = (div + 5) / 10; stb0899_write_reg(state, STB0899_DISEQCOCFG, 0x66); - stb0899_write_reg(state, STB0899_ACRPRESC, 0x31); + reg = stb0899_read_reg(state, STB0899_ACRPRESC); + STB0899_SETFIELD_VAL(ACRPRESC, reg, 0x03); + stb0899_write_reg(state, STB0899_ACRPRESC, reg); stb0899_write_reg(state, STB0899_ACRDIV1, div); break; case SEC_TONE_OFF: diff --git a/drivers/media/dvb/frontends/stb0899_reg.h b/drivers/media/dvb/frontends/stb0899_reg.h index cc65e08f9142..d2e9217c767a 100644 --- a/drivers/media/dvb/frontends/stb0899_reg.h +++ b/drivers/media/dvb/frontends/stb0899_reg.h @@ -1805,6 +1805,15 @@ /* General Purpose */ #define STB0899_SYSREG 0xf101 #define STB0899_ACRPRESC 0xf110 +#define STB0899_OFFST_RSVD2 7 +#define STB0899_WIDTH_RSVD2 1 +#define STB0899_OFFST_ACRPRESC 4 +#define STB0899_WIDTH_ACRPRESC 3 +#define STB0899_OFFST_RSVD1 3 +#define STB0899_WIDTH_RSVD1 1 +#define STB0899_OFFST_ACRPRESC2 0 +#define STB0899_WIDTH_ACRPRESC2 3 + #define STB0899_ACRDIV1 0xf111 #define STB0899_ACRDIV2 0xf112 #define STB0899_DACR1 0xf113 -- 2.20.1