From b9bc88118029d20f25f9e457a147de65ada00f7c Mon Sep 17 00:00:00 2001 From: Robin Murphy Date: Mon, 12 Sep 2016 17:13:43 +0100 Subject: [PATCH] Docs: dt: document ARM SMMUv3 generic binding usage We're about to ratify our use of the generic binding, so document it. CC: Rob Herring CC: Mark Rutland Signed-off-by: Robin Murphy Signed-off-by: Will Deacon --- Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt b/Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt index 7b94c88cf2ee..be57550e14e4 100644 --- a/Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt +++ b/Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt @@ -27,6 +27,12 @@ the PCIe specification. * "cmdq-sync" - CMD_SYNC complete * "gerror" - Global Error activated +- #iommu-cells : See the generic IOMMU binding described in + devicetree/bindings/pci/pci-iommu.txt + for details. For SMMUv3, must be 1, with each cell + describing a single stream ID. All possible stream + IDs which a device may emit must be described. + ** SMMUv3 optional properties: - dma-coherent : Present if DMA operations made by the SMMU (page @@ -54,6 +60,6 @@ the PCIe specification. ; interrupt-names = "eventq", "priq", "cmdq-sync", "gerror"; dma-coherent; - #iommu-cells = <0>; + #iommu-cells = <1>; msi-parent = <&its 0xff0000>; }; -- 2.20.1