From b6e89b21824cc37ab19e0209a7754c74d237a123 Mon Sep 17 00:00:00 2001 From: Dinh Nguyen Date: Mon, 21 Mar 2011 16:30:36 -0500 Subject: [PATCH] ARM: mx51: Add entry for gpc_dvfs_clk For MX51 SRPG, we need to turn on the GPC clock in order to set the SRPG registers. Signed-off-by: Dinh Nguyen Signed-off-by: Sascha Hauer --- arch/arm/mach-mx5/clock-mx51-mx53.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c index cc6ad1cf48db..fdbc05ed5513 100644 --- a/arch/arm/mach-mx5/clock-mx51-mx53.c +++ b/arch/arm/mach-mx5/clock-mx51-mx53.c @@ -865,6 +865,13 @@ static struct clk aips_tz2_clk = { .disable = _clk_ccgr_disable_inwait, }; +static struct clk gpc_dvfs_clk = { + .enable_reg = MXC_CCM_CCGR5, + .enable_shift = MXC_CCM_CCGRx_CG12_OFFSET, + .enable = _clk_ccgr_enable, + .disable = _clk_ccgr_disable, +}; + static struct clk gpt_32k_clk = { .id = 0, .parent = &ckil_clk, @@ -1448,6 +1455,7 @@ static struct clk_lookup mx51_lookups[] = { _REGISTER_CLOCK("imx-ipuv3", NULL, ipu_clk) _REGISTER_CLOCK("imx-ipuv3", "di0", ipu_di0_clk) _REGISTER_CLOCK("imx-ipuv3", "di1", ipu_di1_clk) + _REGISTER_CLOCK(NULL, "gpc_dvfs", gpc_dvfs_clk) }; static struct clk_lookup mx53_lookups[] = { -- 2.20.1