From b397c96b6d6478910cd4263af3124ee07d304e8b Mon Sep 17 00:00:00 2001 From: =?utf8?q?Ville=20Syrj=C3=A4l=C3=A4?= Date: Wed, 4 Sep 2013 18:30:06 +0300 Subject: [PATCH] drm/i915: Fix up pipe vs. double wide confusion MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Double wide mode is only available on pipe A, except on GDG where pipe B is also double wide capable. Signed-off-by: Ville Syrjälä Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_display.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 9bbb6ea34d06..4dd6561cb7c8 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -4153,10 +4153,10 @@ static int intel_crtc_compute_config(struct intel_crtc *crtc, * Enable pixel doubling when the dot clock * is > 90% of the (display) core speed. * - * XXX: No double-wide on 915GM pipe B. Is that - * the only reason for the pipe == PIPE_A check? + * GDG double wide on either pipe, + * otherwise pipe A only. */ - if (crtc->pipe == PIPE_A && + if ((crtc->pipe == PIPE_A || IS_I915G(dev)) && adjusted_mode->clock > clock_limit * 9 / 10) { clock_limit *= 2; pipe_config->double_wide = true; -- 2.20.1