From af973d2aff6008bc7500277eb5a523db579731c6 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Sun, 10 Jul 2005 19:58:06 +0100 Subject: [PATCH] [PATCH] ARM: 2797/1: OMAP update 1/11: Update include files Patch from Tony Lindgren This patch by various OMAP developers syncs the OMAP specific include files with the linux-omap tree. Signed-off-by: Tony Lindgren Signed-off-by: Russell King --- include/asm-arm/arch-omap/board-h2.h | 5 ----- include/asm-arm/arch-omap/board-h3.h | 5 ----- include/asm-arm/arch-omap/board-osk.h | 5 ----- include/asm-arm/arch-omap/board.h | 12 +++++++--- include/asm-arm/arch-omap/hardware.h | 24 +++++++++++++------- include/asm-arm/arch-omap/irqs.h | 3 +++ include/asm-arm/arch-omap/omap16xx.h | 32 +++++++++++++++++++++++++++ include/asm-arm/arch-omap/system.h | 21 +++++++++++++++++- 8 files changed, 80 insertions(+), 27 deletions(-) diff --git a/include/asm-arm/arch-omap/board-h2.h b/include/asm-arm/arch-omap/board-h2.h index 60f002b72983..39ca5a31aeea 100644 --- a/include/asm-arm/arch-omap/board-h2.h +++ b/include/asm-arm/arch-omap/board-h2.h @@ -34,11 +34,6 @@ /* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */ #define OMAP1610_ETHR_START 0x04000300 -/* Intel STRATA NOR flash at CS3 or CS2B(NAND Boot) */ -#define OMAP_NOR_FLASH_SIZE SZ_32M -#define OMAP_NOR_FLASH_START1 0x0C000000 /* CS3 */ -#define OMAP_NOR_FLASH_START2 0x0A000000 /* CS2B */ - /* Samsung NAND flash at CS2B or CS3(NAND Boot) */ #define OMAP_NAND_FLASH_START1 0x0A000000 /* CS2B */ #define OMAP_NAND_FLASH_START2 0x0C000000 /* CS3 */ diff --git a/include/asm-arm/arch-omap/board-h3.h b/include/asm-arm/arch-omap/board-h3.h index e4d1cd231731..1b12c1dcc2fa 100644 --- a/include/asm-arm/arch-omap/board-h3.h +++ b/include/asm-arm/arch-omap/board-h3.h @@ -30,11 +30,6 @@ /* In OMAP1710 H3 the Ethernet is directly connected to CS1 */ #define OMAP1710_ETHR_START 0x04000300 -/* Intel STRATA NOR flash at CS3 or CS2B(NAND Boot) */ -#define OMAP_NOR_FLASH_SIZE SZ_32M -#define OMAP_NOR_FLASH_START1 0x0C000000 /* CS3 */ -#define OMAP_NOR_FLASH_START2 0x0A000000 /* CS2B */ - /* Samsung NAND flash at CS2B or CS3(NAND Boot) */ #define OMAP_NAND_FLASH_START1 0x0A000000 /* CS2B */ #define OMAP_NAND_FLASH_START2 0x0C000000 /* CS3 */ diff --git a/include/asm-arm/arch-omap/board-osk.h b/include/asm-arm/arch-omap/board-osk.h index aaa49a0fbd21..2b1a8a4fe44e 100644 --- a/include/asm-arm/arch-omap/board-osk.h +++ b/include/asm-arm/arch-omap/board-osk.h @@ -32,10 +32,5 @@ /* At OMAP5912 OSK the Ethernet is directly connected to CS1 */ #define OMAP_OSK_ETHR_START 0x04800300 -/* Micron NOR flash at CS3 mapped to address 0x0 if BM bit is 1 */ -#define OMAP_OSK_NOR_FLASH_BASE 0xD8000000 -#define OMAP_OSK_NOR_FLASH_SIZE SZ_32M -#define OMAP_OSK_NOR_FLASH_START 0x00000000 - #endif /* __ASM_ARCH_OMAP_OSK_H */ diff --git a/include/asm-arm/arch-omap/board.h b/include/asm-arm/arch-omap/board.h index 1cefd60b6f2a..95bd625480c1 100644 --- a/include/asm-arm/arch-omap/board.h +++ b/include/asm-arm/arch-omap/board.h @@ -16,10 +16,11 @@ /* Different peripheral ids */ #define OMAP_TAG_CLOCK 0x4f01 #define OMAP_TAG_MMC 0x4f02 -#define OMAP_TAG_UART 0x4f03 +#define OMAP_TAG_SERIAL_CONSOLE 0x4f03 #define OMAP_TAG_USB 0x4f04 #define OMAP_TAG_LCD 0x4f05 #define OMAP_TAG_GPIO_SWITCH 0x4f06 +#define OMAP_TAG_UART 0x4f07 #define OMAP_TAG_BOOT_REASON 0x4f80 #define OMAP_TAG_FLASH_PART 0x4f81 @@ -35,7 +36,7 @@ struct omap_mmc_config { s16 mmc1_switch_pin, mmc2_switch_pin; }; -struct omap_uart_config { +struct omap_serial_console_config { u8 console_uart; u32 console_speed; }; @@ -82,7 +83,8 @@ struct omap_lcd_config { */ #define OMAP_GPIO_SWITCH_TYPE_COVER 0x0000 #define OMAP_GPIO_SWITCH_TYPE_CONNECTION 0x0001 -#define OMAP_GPIO_SWITCH_FLAG_INVERTED 0x0001 +#define OMAP_GPIO_SWITCH_FLAG_INVERTED 0x0001 +#define OMAP_GPIO_SWITCH_FLAG_OUTPUT 0x0002 struct omap_gpio_switch_config { char name[12]; u16 gpio; @@ -99,6 +101,10 @@ struct omap_boot_reason_config { char reason_str[12]; }; +struct omap_uart_config { + /* Bit field of UARTs present; bit 0 --> UART1 */ + unsigned int enabled_uarts; +}; struct omap_board_config_entry { u16 tag; diff --git a/include/asm-arm/arch-omap/hardware.h b/include/asm-arm/arch-omap/hardware.h index 37e06c782bdf..48258c7f6541 100644 --- a/include/asm-arm/arch-omap/hardware.h +++ b/include/asm-arm/arch-omap/hardware.h @@ -52,6 +52,19 @@ * --------------------------------------------------------------------------- */ +/* + * ---------------------------------------------------------------------------- + * Timers + * ---------------------------------------------------------------------------- + */ +#define OMAP_MPU_TIMER1_BASE (0xfffec500) +#define OMAP_MPU_TIMER2_BASE (0xfffec600) +#define OMAP_MPU_TIMER3_BASE (0xfffec700) +#define MPU_TIMER_FREE (1 << 6) +#define MPU_TIMER_CLOCK_ENABLE (1 << 5) +#define MPU_TIMER_AR (1 << 1) +#define MPU_TIMER_ST (1 << 0) + /* * ---------------------------------------------------------------------------- * Clocks @@ -78,6 +91,7 @@ /* DSP clock control */ #define DSP_CONFIG_REG_BASE (0xe1008000) +#define DSP_CKCTL (DSP_CONFIG_REG_BASE + 0x0) #define DSP_IDLECT1 (DSP_CONFIG_REG_BASE + 0x4) #define DSP_IDLECT2 (DSP_CONFIG_REG_BASE + 0x8) @@ -88,6 +102,7 @@ */ #define ULPD_REG_BASE (0xfffe0800) #define ULPD_IT_STATUS (ULPD_REG_BASE + 0x14) +#define ULPD_SETUP_ANALOG_CELL_3 (ULPD_REG_BASE + 0x24) #define ULPD_CLOCK_CTRL (ULPD_REG_BASE + 0x30) # define DIS_USB_PVCI_CLK (1 << 5) /* no USB/FAC synch */ # define USB_MCLK_EN (1 << 4) /* enable W4_USB_CLKO */ @@ -268,17 +283,10 @@ * Processor specific defines * --------------------------------------------------------------------------- */ -#ifdef CONFIG_ARCH_OMAP730 -#include "omap730.h" -#endif -#ifdef CONFIG_ARCH_OMAP1510 +#include "omap730.h" #include "omap1510.h" -#endif - -#ifdef CONFIG_ARCH_OMAP16XX #include "omap16xx.h" -#endif /* * --------------------------------------------------------------------------- diff --git a/include/asm-arm/arch-omap/irqs.h b/include/asm-arm/arch-omap/irqs.h index 6701fd9e5f9b..0d05a7c957d1 100644 --- a/include/asm-arm/arch-omap/irqs.h +++ b/include/asm-arm/arch-omap/irqs.h @@ -159,6 +159,7 @@ #define INT_1610_GPIO_BANK3 (41 + IH2_BASE) #define INT_1610_MMC2 (42 + IH2_BASE) #define INT_1610_CF (43 + IH2_BASE) +#define INT_1610_WAKE_UP_REQ (46 + IH2_BASE) #define INT_1610_GPIO_BANK4 (48 + IH2_BASE) #define INT_1610_SPI (49 + IH2_BASE) #define INT_1610_DMA_CH6 (53 + IH2_BASE) @@ -238,6 +239,8 @@ #define IH_MPUIO_BASE (OMAP_MAX_GPIO_LINES + IH_GPIO_BASE) #define IH_BOARD_BASE (16 + IH_MPUIO_BASE) +#define OMAP_IRQ_BIT(irq) (1 << ((irq) % 32)) + #ifndef __ASSEMBLY__ extern void omap_init_irq(void); #endif diff --git a/include/asm-arm/arch-omap/omap16xx.h b/include/asm-arm/arch-omap/omap16xx.h index 88b1fe43ae9e..38a9b95e6a33 100644 --- a/include/asm-arm/arch-omap/omap16xx.h +++ b/include/asm-arm/arch-omap/omap16xx.h @@ -183,5 +183,37 @@ #define OMAP16XX_PWL_ENABLE (OMAP16XX_PWL_BASE + 0x00) #define OMAP16XX_PWL_CLK_ENABLE (OMAP16XX_PWL_BASE + 0x04) +/* + * --------------------------------------------------------------------------- + * Watchdog timer + * --------------------------------------------------------------------------- + */ + +/* 32-bit Watchdog timer in OMAP 16XX */ +#define OMAP_16XX_WATCHDOG_BASE (0xfffeb000) +#define OMAP_16XX_WIDR (OMAP_16XX_WATCHDOG_BASE + 0x00) +#define OMAP_16XX_WD_SYSCONFIG (OMAP_16XX_WATCHDOG_BASE + 0x10) +#define OMAP_16XX_WD_SYSSTATUS (OMAP_16XX_WATCHDOG_BASE + 0x14) +#define OMAP_16XX_WCLR (OMAP_16XX_WATCHDOG_BASE + 0x24) +#define OMAP_16XX_WCRR (OMAP_16XX_WATCHDOG_BASE + 0x28) +#define OMAP_16XX_WLDR (OMAP_16XX_WATCHDOG_BASE + 0x2c) +#define OMAP_16XX_WTGR (OMAP_16XX_WATCHDOG_BASE + 0x30) +#define OMAP_16XX_WWPS (OMAP_16XX_WATCHDOG_BASE + 0x34) +#define OMAP_16XX_WSPR (OMAP_16XX_WATCHDOG_BASE + 0x48) + +#define WCLR_PRE_SHIFT 5 +#define WCLR_PTV_SHIFT 2 + +#define WWPS_W_PEND_WSPR (1 << 4) +#define WWPS_W_PEND_WTGR (1 << 3) +#define WWPS_W_PEND_WLDR (1 << 2) +#define WWPS_W_PEND_WCRR (1 << 1) +#define WWPS_W_PEND_WCLR (1 << 0) + +#define WSPR_ENABLE_0 (0x0000bbbb) +#define WSPR_ENABLE_1 (0x00004444) +#define WSPR_DISABLE_0 (0x0000aaaa) +#define WSPR_DISABLE_1 (0x00005555) + #endif /* __ASM_ARCH_OMAP16XX_H */ diff --git a/include/asm-arm/arch-omap/system.h b/include/asm-arm/arch-omap/system.h index 17a2c4825f07..ff37bc27e603 100644 --- a/include/asm-arm/arch-omap/system.h +++ b/include/asm-arm/arch-omap/system.h @@ -5,7 +5,9 @@ #ifndef __ASM_ARCH_SYSTEM_H #define __ASM_ARCH_SYSTEM_H #include +#include #include +#include static inline void arch_idle(void) { @@ -14,7 +16,24 @@ static inline void arch_idle(void) static inline void arch_reset(char mode) { - omap_writew(1, ARM_RSTCT1); + +#ifdef CONFIG_ARCH_OMAP16XX + /* + * Workaround for 5912/1611b bug mentioned in sprz209d.pdf p. 28 + * "Global Software Reset Affects Traffic Controller Frequency". + */ + if (cpu_is_omap5912()) { + omap_writew(omap_readw(DPLL_CTL) & ~(1 << 4), + DPLL_CTL); + omap_writew(0x8, ARM_RSTCT1); + } +#endif +#ifdef CONFIG_MACH_VOICEBLUE + if (machine_is_voiceblue()) + voiceblue_reset(); + else +#endif + omap_writew(1, ARM_RSTCT1); } #endif -- 2.20.1