From a8fa9ba623122a51efe6c9ef8fe7412c91582d48 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Thu, 8 Nov 2007 01:48:16 +0100 Subject: [PATCH] [ARM] 4644/2: fix flush_kern_tlb_range() in module space For kernel addresses between TASK_SIZE and PAGE_OFFSET, flush_tlb_kern_range() does not work as would be expected. The TLB invalidate works with a matching ASID, or on entries marked as global. The set_pte_at() macro marks addresses >= PAGE_OFFSET as global, but not addresses from TASK_SIZE to PAGE_OFFSET, which are also kernel addresses. The result is that the entries in this range are not actually invalidated by flush_tlb_kern_range(). This patch instead marks addresses >= TASK_SIZE as global. Signed-off-by: Satoru Fujii Signed-off-by: Kevin Hilman Signed-off-by: Russell King --- include/asm-arm/pgtable.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/asm-arm/pgtable.h b/include/asm-arm/pgtable.h index d2e8171d1d4e..5e0182485d8c 100644 --- a/include/asm-arm/pgtable.h +++ b/include/asm-arm/pgtable.h @@ -249,7 +249,7 @@ extern struct page *empty_zero_page; #define set_pte_ext(ptep,pte,ext) cpu_set_pte_ext(ptep,pte,ext) #define set_pte_at(mm,addr,ptep,pteval) do { \ - set_pte_ext(ptep, pteval, (addr) >= PAGE_OFFSET ? 0 : PTE_EXT_NG); \ + set_pte_ext(ptep, pteval, (addr) >= TASK_SIZE ? 0 : PTE_EXT_NG); \ } while (0) /* -- 2.20.1