From a5ccfe5c1a48bff1e47788d470ee50974f7dd33d Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Sun, 14 Oct 2007 23:49:33 +0100 Subject: [PATCH] [MIPS] Lasat: Fix build by conversion to irq_cpu.c. Signed-off-by: Ralf Baechle --- arch/mips/Kconfig | 1 + arch/mips/lasat/interrupt.c | 8 +++++--- arch/mips/pci/pci-lasat.c | 19 ++++++++++--------- include/asm-mips/lasat/lasatint.h | 5 ++++- 4 files changed, 20 insertions(+), 13 deletions(-) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index f921235239f9..235d4514e0a9 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -133,6 +133,7 @@ config LASAT select DMA_NONCOHERENT select SYS_HAS_EARLY_PRINTK select HW_HAS_PCI + select IRQ_CPU select PCI_GT64XXX_PCI0 select MIPS_NILE4 select R5000_CPU_SCACHE diff --git a/arch/mips/lasat/interrupt.c b/arch/mips/lasat/interrupt.c index 5f35289bfff5..ba9692be3564 100644 --- a/arch/mips/lasat/interrupt.c +++ b/arch/mips/lasat/interrupt.c @@ -26,6 +26,7 @@ #include #include +#include #include #include #include @@ -88,7 +89,7 @@ asmlinkage void plat_irq_dispatch(void) int irq; if (cause & CAUSEF_IP7) { /* R4000 count / compare IRQ */ - ll_timer_interrupt(7); + do_IRQ(7); return; } @@ -96,7 +97,7 @@ asmlinkage void plat_irq_dispatch(void) /* if int_status == 0, then the interrupt has already been cleared */ if (int_status) { - irq = ls1bit32(int_status); + irq = LASATINT_BASE + ls1bit32(int_status); do_IRQ(irq); } @@ -125,6 +126,7 @@ void __init arch_init_irq(void) panic("arch_init_irq: mips_machtype incorrect"); } - for (i = 0; i <= LASATINT_END; i++) + mips_cpu_irq_init(); + for (i = LASATINT_BASE; i <= LASATINT_END; i++) set_irq_chip_and_handler(i, &lasat_irq_type, handle_level_irq); } diff --git a/arch/mips/pci/pci-lasat.c b/arch/mips/pci/pci-lasat.c index 5abd5c7119be..174f314933b5 100644 --- a/arch/mips/pci/pci-lasat.c +++ b/arch/mips/pci/pci-lasat.c @@ -10,6 +10,7 @@ #include #include #include +#include extern struct pci_ops nile4_pci_ops; extern struct pci_ops gt64xxx_pci0_ops; @@ -54,15 +55,15 @@ static int __init lasat_pci_setup(void) arch_initcall(lasat_pci_setup); -#define LASATINT_ETH1 0 -#define LASATINT_ETH0 1 -#define LASATINT_HDC 2 -#define LASATINT_COMP 3 -#define LASATINT_HDLC 4 -#define LASATINT_PCIA 5 -#define LASATINT_PCIB 6 -#define LASATINT_PCIC 7 -#define LASATINT_PCID 8 +#define LASATINT_ETH1 (LASATINT_BASE + 0) +#define LASATINT_ETH0 (LASATINT_BASE + 1) +#define LASATINT_HDC (LASATINT_BASE + 2) +#define LASATINT_COMP (LASATINT_BASE + 3) +#define LASATINT_HDLC (LASATINT_BASE + 4) +#define LASATINT_PCIA (LASATINT_BASE + 5) +#define LASATINT_PCIB (LASATINT_BASE + 6) +#define LASATINT_PCIC (LASATINT_BASE + 7) +#define LASATINT_PCID (LASATINT_BASE + 8) int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { diff --git a/include/asm-mips/lasat/lasatint.h b/include/asm-mips/lasat/lasatint.h index 1d4a52e12530..581dc45685a2 100644 --- a/include/asm-mips/lasat/lasatint.h +++ b/include/asm-mips/lasat/lasatint.h @@ -1,7 +1,10 @@ #ifndef __ASM_LASAT_LASATINT_H #define __ASM_LASAT_LASATINT_H -#define LASATINT_END 16 +#include + +#define LASATINT_BASE MIPS_CPU_IRQ_BASE +#define LASATINT_END (LASATINT_BASE + 16) /* lasat 100 */ #define LASAT_INT_STATUS_REG_100 (KSEG1ADDR(0x1c880000)) -- 2.20.1