From a202707e71ff16d5e3a92f40eeaa41f3099dd8c5 Mon Sep 17 00:00:00 2001 From: Chris David Date: Sat, 13 Oct 2007 23:56:33 +0200 Subject: [PATCH] i2c-au1550: Fix a misused register problem Fix a "mis-used register" problem on the AMD MIPS Alchemy au1550 I2C interface. In summary, the programmable serial controller seems to hang the kernel when I send a single 'address' byte on the I2C bus. The patch essentially uses the PSC_SMBSTAT register's TE (transmit FIFO empty) bit to check when the transmit FIFO is empty, instead of using the PSC_SMBEVNT register's TU (transmit underflow) bit. Using the TE bit fixed the hang problem. Signed-off-by: Chris David Acked-by: Ralf Baechle Signed-off-by: Jean Delvare --- drivers/i2c/busses/i2c-au1550.c | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) diff --git a/drivers/i2c/busses/i2c-au1550.c b/drivers/i2c/busses/i2c-au1550.c index d7e7c359fc36..2f684166c43d 100644 --- a/drivers/i2c/busses/i2c-au1550.c +++ b/drivers/i2c/busses/i2c-au1550.c @@ -48,17 +48,14 @@ wait_xfer_done(struct i2c_au1550_data *adap) sp = (volatile psc_smb_t *)(adap->psc_base); - /* Wait for Tx FIFO Underflow. + /* Wait for Tx Buffer Empty */ for (i = 0; i < adap->xfer_timeout; i++) { - stat = sp->psc_smbevnt; + stat = sp->psc_smbstat; au_sync(); - if ((stat & PSC_SMBEVNT_TU) != 0) { - /* Clear it. */ - sp->psc_smbevnt = PSC_SMBEVNT_TU; - au_sync(); + if ((stat & PSC_SMBSTAT_TE) != 0) return 0; - } + udelay(1); } -- 2.20.1