From a1a33fa315b8a5a390f1132681485209500ff5b5 Mon Sep 17 00:00:00 2001 From: Akinobu Mita Date: Sat, 19 Apr 2008 23:55:13 +0900 Subject: [PATCH] x86: use bitmap library for pin_programmed Use bitmap library for pin_programmed rather than reinvent bitmaps. Signed-off-by: Akinobu Mita Signed-off-by: Ingo Molnar --- arch/x86/kernel/mpparse.c | 14 +++++--------- include/asm-x86/io_apic.h | 6 ++++-- 2 files changed, 9 insertions(+), 11 deletions(-) diff --git a/arch/x86/kernel/mpparse.c b/arch/x86/kernel/mpparse.c index 534790b6d0f..23e8432a982 100644 --- a/arch/x86/kernel/mpparse.c +++ b/arch/x86/kernel/mpparse.c @@ -799,7 +799,6 @@ void __init find_smp_config(void) #ifdef CONFIG_X86_IO_APIC #define MP_ISA_BUS 0 -#define MP_MAX_IOAPIC_PIN 127 extern struct mp_ioapic_routing mp_ioapic_routing[MAX_IO_APICS]; @@ -982,9 +981,8 @@ void __init mp_config_acpi_legacy_irqs(void) int mp_register_gsi(u32 gsi, int triggering, int polarity) { - int ioapic = -1; - int ioapic_pin = 0; - int idx, bit = 0; + int ioapic; + int ioapic_pin; #ifdef CONFIG_X86_32 #define MAX_GSI_NUM 4096 #define IRQ_COMPRESSION_START 64 @@ -1024,15 +1022,13 @@ int mp_register_gsi(u32 gsi, int triggering, int polarity) * with redundant pin->gsi mappings (but unique PCI devices); * we only program the IOAPIC on the first. */ - bit = ioapic_pin % 32; - idx = (ioapic_pin < 32) ? 0 : (ioapic_pin / 32); - if (idx > 3) { + if (ioapic_pin > MP_MAX_IOAPIC_PIN) { printk(KERN_ERR "Invalid reference to IOAPIC pin " "%d-%d\n", mp_ioapic_routing[ioapic].apic_id, ioapic_pin); return gsi; } - if ((1 << bit) & mp_ioapic_routing[ioapic].pin_programmed[idx]) { + if (test_bit(ioapic_pin, mp_ioapic_routing[ioapic].pin_programmed)) { Dprintk(KERN_DEBUG "Pin %d-%d already programmed\n", mp_ioapic_routing[ioapic].apic_id, ioapic_pin); #ifdef CONFIG_X86_32 @@ -1042,7 +1038,7 @@ int mp_register_gsi(u32 gsi, int triggering, int polarity) #endif } - mp_ioapic_routing[ioapic].pin_programmed[idx] |= (1 << bit); + set_bit(ioapic_pin, mp_ioapic_routing[ioapic].pin_programmed); #ifdef CONFIG_X86_32 /* * For GSI >= 64, use IRQ compression diff --git a/include/asm-x86/io_apic.h b/include/asm-x86/io_apic.h index 0c9e17c73e0..d593e14f034 100644 --- a/include/asm-x86/io_apic.h +++ b/include/asm-x86/io_apic.h @@ -1,7 +1,7 @@ #ifndef __ASM_IO_APIC_H #define __ASM_IO_APIC_H -#include +#include #include #include @@ -110,11 +110,13 @@ extern int nr_ioapic_registers[MAX_IO_APICS]; * MP-BIOS irq configuration table structures: */ +#define MP_MAX_IOAPIC_PIN 127 + struct mp_ioapic_routing { int apic_id; int gsi_base; int gsi_end; - u32 pin_programmed[4]; + DECLARE_BITMAP(pin_programmed, MP_MAX_IOAPIC_PIN + 1); }; /* I/O APIC entries */ -- 2.20.1