From 96d26554ddb550d53a721192f44e0086dc1fb3ee Mon Sep 17 00:00:00 2001 From: Richard Fitzgerald Date: Tue, 11 Jul 2017 14:18:43 +0100 Subject: [PATCH] mfd: cs47l35: FLL1_EFS must be readable The FLL1_EFS2 register contains the PHASE_ENA bit which the FLL configuration code updates, so this register must be accessible. Change-Id: Ie05b566da9dd88807db740d86dcc3f90435fa188 Signed-off-by: Richard Fitzgerald --- drivers/mfd/cs47l35-tables.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/mfd/cs47l35-tables.c b/drivers/mfd/cs47l35-tables.c index 618e2ba7afbe..9ebfbedd2290 100644 --- a/drivers/mfd/cs47l35-tables.c +++ b/drivers/mfd/cs47l35-tables.c @@ -112,6 +112,7 @@ static const struct reg_default cs47l35_reg_default[] = { { 0x00000176, 0x0000 }, /* R374 (0x176) - FLL1 Control 6 */ { 0x00000177, 0x0281 }, /* R375 (0x177) - FLL1 Loop Filter Test 1 */ { 0x00000179, 0x0000 }, /* R377 (0x179) - FLL1 Control 7 */ + { 0x0000017a, 0x0b06 }, /* R378 (0x17a) - FLL1 EFS2 */ { 0x0000017f, 0x0000 }, /* R383 (0x17f) - FLL1 Synchroniser 1 */ { 0x00000180, 0x0000 }, /* R384 (0x180) - FLL1 Synchroniser 2 */ { 0x00000181, 0x0000 }, /* R385 (0x181) - FLL1 Synchroniser 3 */ @@ -891,6 +892,7 @@ static bool cs47l35_16bit_readable_register(struct device *dev, case MADERA_FLL1_CONTROL_5: case MADERA_FLL1_CONTROL_6: case MADERA_FLL1_CONTROL_7: + case MADERA_FLL1_EFS_2: case MADERA_FLL1_LOOP_FILTER_TEST_1: case CS47L35_FLL1_SYNCHRONISER_1: case CS47L35_FLL1_SYNCHRONISER_2: -- 2.20.1