From 9619dba8325fce098bbc9ee2911d1b0150fec0c9 Mon Sep 17 00:00:00 2001 From: Peter De Schrijver Date: Thu, 2 Mar 2017 15:22:05 +0200 Subject: [PATCH] clk: tegra: Fix disable unused for clocks sharing enable bit In case 2 clocks share an enable bit and one of them is enabled by a driver and the other one is not, CCF will think it's enabled because it will only look at the HW state. Therefore it will disable the clock and thus also disable the other clock which was enabled. Solve this by reading the initial state of the enable bit and incrementing the refcount if it's set. Signed-off-by: Peter De Schrijver Signed-off-by: Thierry Reding --- drivers/clk/tegra/clk-periph-gate.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/clk/tegra/clk-periph-gate.c b/drivers/clk/tegra/clk-periph-gate.c index 88127828befe..303ef32ee3f1 100644 --- a/drivers/clk/tegra/clk-periph-gate.c +++ b/drivers/clk/tegra/clk-periph-gate.c @@ -159,6 +159,9 @@ struct clk *tegra_clk_register_periph_gate(const char *name, gate->enable_refcnt = enable_refcnt; gate->regs = pregs; + if (read_enb(gate) & periph_clk_to_bit(gate)) + enable_refcnt[clk_num]++; + /* Data in .init is copied by clk_register(), so stack variable OK */ gate->hw.init = &init; -- 2.20.1