From 94bf91baf3a16ec274de3cd913be3033c029f853 Mon Sep 17 00:00:00 2001 From: Vlad Zolotarov Date: Sun, 5 Feb 2012 15:24:39 +0000 Subject: [PATCH] bnx2: Add missing memory barrier in bnx2_start_xmit() Sync DMA descriptor before hitting the TX mailbox for weak memory model CPUs. There has been discussions several years ago about this. Some believe that writel() should guarantee ordering. Others want explicit barriers if necessary. Today writel() does not have the ordering guarantee and many other drivers use explicit barriers. Signed-off-by: Vlad Zolotarov Signed-off-by: Michael Chan Signed-off-by: David S. Miller --- drivers/net/ethernet/broadcom/bnx2.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/net/ethernet/broadcom/bnx2.c b/drivers/net/ethernet/broadcom/bnx2.c index 2ab31daef80f..7105989ba658 100644 --- a/drivers/net/ethernet/broadcom/bnx2.c +++ b/drivers/net/ethernet/broadcom/bnx2.c @@ -6565,6 +6565,9 @@ bnx2_start_xmit(struct sk_buff *skb, struct net_device *dev) } txbd->tx_bd_vlan_tag_flags |= TX_BD_FLAGS_END; + /* Sync BD data before updating TX mailbox */ + wmb(); + netdev_tx_sent_queue(txq, skb->len); prod = NEXT_TX_BD(prod); -- 2.20.1