From 8ab5f1fbd39c29125403678a0caf0a71046da361 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Rafa=C5=82=20Mi=C5=82ecki?= Date: Mon, 6 Jun 2016 09:43:49 +0200 Subject: [PATCH] ARM: BCM5301X: Specify NAND chip select and ECC in separated files MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Using separated file with common chip select parameters will allow us adding other ECC setups without code duplication. Signed-off-by: Rafał Miłecki Signed-off-by: Florian Fainelli --- arch/arm/boot/dts/bcm5301x-nand-cs0-bch8.dtsi | 16 +++++----------- arch/arm/boot/dts/bcm5301x-nand-cs0.dtsi | 18 ++++++++++++++++++ 2 files changed, 23 insertions(+), 11 deletions(-) create mode 100644 arch/arm/boot/dts/bcm5301x-nand-cs0.dtsi diff --git a/arch/arm/boot/dts/bcm5301x-nand-cs0-bch8.dtsi b/arch/arm/boot/dts/bcm5301x-nand-cs0-bch8.dtsi index d10781e36f54..9a9630ded306 100644 --- a/arch/arm/boot/dts/bcm5301x-nand-cs0-bch8.dtsi +++ b/arch/arm/boot/dts/bcm5301x-nand-cs0-bch8.dtsi @@ -9,16 +9,10 @@ * Licensed under the GNU/GPL. See COPYING for details. */ -/ { - nand@18028000 { - nandcs@0 { - compatible = "brcm,nandcs"; - reg = <0>; - #address-cells = <1>; - #size-cells = <1>; +#include "bcm5301x-nand-cs0.dtsi" - nand-ecc-strength = <8>; - nand-ecc-step-size = <512>; - }; - }; +&nandcs { + nand-ecc-algo = "bch"; + nand-ecc-strength = <8>; + nand-ecc-step-size = <512>; }; diff --git a/arch/arm/boot/dts/bcm5301x-nand-cs0.dtsi b/arch/arm/boot/dts/bcm5301x-nand-cs0.dtsi new file mode 100644 index 000000000000..168495106b82 --- /dev/null +++ b/arch/arm/boot/dts/bcm5301x-nand-cs0.dtsi @@ -0,0 +1,18 @@ +/* + * Broadcom Northstar NAND. + * + * Copyright (C) 2015 Hauke Mehrtens + * + * Licensed under the GNU/GPL. See COPYING for details. + */ + +/ { + nand@18028000 { + nandcs: nandcs@0 { + compatible = "brcm,nandcs"; + reg = <0>; + #address-cells = <1>; + #size-cells = <1>; + }; + }; +}; -- 2.20.1