From 7dc351b3537b10db12b748defeecb135cee8f571 Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Mon, 12 May 2014 14:12:32 +1000 Subject: [PATCH] drm/gk104/gpio: fix incorrect interrupt register usage Signed-off-by: Ben Skeggs --- drivers/gpu/drm/nouveau/core/subdev/gpio/nve0.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/nouveau/core/subdev/gpio/nve0.c b/drivers/gpu/drm/nouveau/core/subdev/gpio/nve0.c index 16b8c5bf5efa..8988621373b0 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/gpio/nve0.c +++ b/drivers/gpu/drm/nouveau/core/subdev/gpio/nve0.c @@ -44,7 +44,7 @@ nve0_gpio_intr(struct nouveau_subdev *subdev) } nv_wr32(priv, 0xdc00, intr0); - nv_wr32(priv, 0xdc88, intr1); + nv_wr32(priv, 0xdc80, intr1); } void @@ -52,8 +52,8 @@ nve0_gpio_intr_enable(struct nouveau_event *event, int line) { const u32 addr = line < 16 ? 0xdc00 : 0xdc80; const u32 mask = 0x00010001 << (line & 0xf); - nv_wr32(event->priv, addr + 0x08, mask); - nv_mask(event->priv, addr + 0x00, mask, mask); + nv_wr32(event->priv, addr + 0x00, mask); + nv_mask(event->priv, addr + 0x08, mask, mask); } void @@ -61,8 +61,8 @@ nve0_gpio_intr_disable(struct nouveau_event *event, int line) { const u32 addr = line < 16 ? 0xdc00 : 0xdc80; const u32 mask = 0x00010001 << (line & 0xf); - nv_wr32(event->priv, addr + 0x08, mask); - nv_mask(event->priv, addr + 0x00, mask, 0x00000000); + nv_mask(event->priv, addr + 0x08, mask, 0x00000000); + nv_wr32(event->priv, addr + 0x00, mask); } int -- 2.20.1