From 7732c6b96f127bb5d9474715149b4e94e369412c Mon Sep 17 00:00:00 2001 From: Wim Van Sebroeck Date: Sun, 8 Jul 2012 14:57:09 +0200 Subject: [PATCH] watchdog: sch311x_wdt: Fix Polarity when starting watchdog MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Some motherboards like the Advantech ARK3400 documentation use a non-inverted GPIO pin. We fix this by assuming that the BIOS will set the Polarity bit for the GPIO correctly at startup and we keep the Bit-setting intact when we start and stop the watchdog. Reported-by: Jean-François Deverge Signed-off-by: Dave Mueller Signed-off-by: Wim Van Sebroeck --- drivers/watchdog/sch311x_wdt.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/watchdog/sch311x_wdt.c b/drivers/watchdog/sch311x_wdt.c index f8477002b728..9681ada0f252 100644 --- a/drivers/watchdog/sch311x_wdt.c +++ b/drivers/watchdog/sch311x_wdt.c @@ -136,6 +136,8 @@ static void sch311x_wdt_set_timeout(int t) static void sch311x_wdt_start(void) { + unsigned char t; + spin_lock(&sch311x_wdt_data.io_lock); /* set watchdog's timeout */ @@ -149,7 +151,8 @@ static void sch311x_wdt_start(void) * Bit 4-6 (Reserved) * Bit 7, Output Type: 0 = Push Pull Bit, 1 = Open Drain */ - outb(0x0e, sch311x_wdt_data.runtime_reg + GP60); + t = inb(sch311x_wdt_data.runtime_reg + GP60); + outb((t & ~0x0d) | 0x0c, sch311x_wdt_data.runtime_reg + GP60); spin_unlock(&sch311x_wdt_data.io_lock); @@ -157,10 +160,13 @@ static void sch311x_wdt_start(void) static void sch311x_wdt_stop(void) { + unsigned char t; + spin_lock(&sch311x_wdt_data.io_lock); /* stop the watchdog */ - outb(0x01, sch311x_wdt_data.runtime_reg + GP60); + t = inb(sch311x_wdt_data.runtime_reg + GP60); + outb((t & ~0x0d) | 0x01, sch311x_wdt_data.runtime_reg + GP60); /* disable timeout by setting it to 0 */ sch311x_wdt_set_timeout(0); -- 2.20.1