From 7587eb18fa9d7c3c227d48d27a18dcb3042d7e17 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Otto=20Kek=C3=A4l=C3=A4inen?= Date: Wed, 13 Jul 2016 21:08:07 +0300 Subject: [PATCH] Fix spelling errors in Documentation/devicetree MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Signed-off-by: Otto Kekäläinen Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/arm/l2c2x0.txt | 4 ++-- Documentation/devicetree/bindings/net/dsa/dsa.txt | 2 +- Documentation/devicetree/bindings/powerpc/fsl/fman.txt | 4 ++-- Documentation/devicetree/bindings/regmap/regmap.txt | 2 +- Documentation/devicetree/bindings/serial/qcom,msm-uartdm.txt | 4 ++-- Documentation/devicetree/bindings/sound/simple-card.txt | 2 +- Documentation/devicetree/bindings/spi/ti_qspi.txt | 2 +- .../devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.txt | 2 +- 8 files changed, 11 insertions(+), 11 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/l2c2x0.txt b/Documentation/devicetree/bindings/arm/l2c2x0.txt index c453ab5553cd..917199f17965 100644 --- a/Documentation/devicetree/bindings/arm/l2c2x0.txt +++ b/Documentation/devicetree/bindings/arm/l2c2x0.txt @@ -86,10 +86,10 @@ Optional properties: firmware) - arm,dynamic-clock-gating : L2 dynamic clock gating. Value: <0> (forcibly disable), <1> (forcibly enable), property absent (OS specific behavior, - preferrably retain firmware settings) + preferably retain firmware settings) - arm,standby-mode: L2 standby mode enable. Value <0> (forcibly disable), <1> (forcibly enable), property absent (OS specific behavior, - preferrably retain firmware settings) + preferably retain firmware settings) Example: diff --git a/Documentation/devicetree/bindings/net/dsa/dsa.txt b/Documentation/devicetree/bindings/net/dsa/dsa.txt index 9f4807f90c31..eb13eaf0549b 100644 --- a/Documentation/devicetree/bindings/net/dsa/dsa.txt +++ b/Documentation/devicetree/bindings/net/dsa/dsa.txt @@ -43,7 +43,7 @@ Each port children node must have the following mandatory properties: Note that a port labelled "dsa" will imply checking for the uplink phandle described below. -Optionnal property: +Optional property: - link : Should be a list of phandles to another switch's DSA port. This property is only used when switches are being chained/cascaded together. This port is used as outgoing port diff --git a/Documentation/devicetree/bindings/powerpc/fsl/fman.txt b/Documentation/devicetree/bindings/powerpc/fsl/fman.txt index 55c2c03fc81e..df873d1f3b7c 100644 --- a/Documentation/devicetree/bindings/powerpc/fsl/fman.txt +++ b/Documentation/devicetree/bindings/powerpc/fsl/fman.txt @@ -35,7 +35,7 @@ PROPERTIES Definition: Specifies the index of the FMan unit. The cell-index value may be used by the SoC, to identify the - FMan unit in the SoC memory map. In the table bellow, + FMan unit in the SoC memory map. In the table below, there's a description of the cell-index use in each SoC: - P1023: @@ -247,7 +247,7 @@ PROPERTIES The cell-index value may be used by the FMan or the SoC, to identify the MAC unit in the FMan (or SoC) memory map. - In the tables bellow there's a description of the cell-index + In the tables below there's a description of the cell-index use, there are two tables, one describes the use of cell-index by the FMan, the second describes the use by the SoC: diff --git a/Documentation/devicetree/bindings/regmap/regmap.txt b/Documentation/devicetree/bindings/regmap/regmap.txt index 0127be360fe8..873096be0278 100644 --- a/Documentation/devicetree/bindings/regmap/regmap.txt +++ b/Documentation/devicetree/bindings/regmap/regmap.txt @@ -14,7 +14,7 @@ architectures that typically run big-endian operating systems be marked that way in the devicetree. On SoCs that can be operated in both big-endian and little-endian -modes, with a single hardware switch controlling both the endianess +modes, with a single hardware switch controlling both the endianness of the CPU and a byteswap for MMIO registers (e.g. many Broadcom MIPS chips), "native-endian" is used to allow using the same device tree blob in both cases. diff --git a/Documentation/devicetree/bindings/serial/qcom,msm-uartdm.txt b/Documentation/devicetree/bindings/serial/qcom,msm-uartdm.txt index 182777fac9a2..d5f73b8f614f 100644 --- a/Documentation/devicetree/bindings/serial/qcom,msm-uartdm.txt +++ b/Documentation/devicetree/bindings/serial/qcom,msm-uartdm.txt @@ -28,10 +28,10 @@ Optional properties: - dma-names: Should contain "tx" for transmit and "rx" for receive channels - qcom,tx-crci: Identificator for Client Rate Control Interface to be used with TX DMA channel. Required when using DMA for transmission - with UARTDM v1.3 and bellow. + with UARTDM v1.3 and below. - qcom,rx-crci: Identificator for Client Rate Control Interface to be used with RX DMA channel. Required when using DMA for reception - with UARTDM v1.3 and bellow. + with UARTDM v1.3 and below. Note: Aliases may be defined to ensure the correct ordering of the UARTs. The alias serialN will result in the UART being assigned port N. If any diff --git a/Documentation/devicetree/bindings/sound/simple-card.txt b/Documentation/devicetree/bindings/sound/simple-card.txt index cf3979eb3578..59d862801e59 100644 --- a/Documentation/devicetree/bindings/sound/simple-card.txt +++ b/Documentation/devicetree/bindings/sound/simple-card.txt @@ -30,7 +30,7 @@ Optional subnodes: sub-nodes. This container may be omitted when the card has only one DAI link. See the examples and the - section bellow. + section below. Dai-link subnode properties and subnodes: diff --git a/Documentation/devicetree/bindings/spi/ti_qspi.txt b/Documentation/devicetree/bindings/spi/ti_qspi.txt index 50b14f6b53a3..e65fde4a7388 100644 --- a/Documentation/devicetree/bindings/spi/ti_qspi.txt +++ b/Documentation/devicetree/bindings/spi/ti_qspi.txt @@ -20,7 +20,7 @@ Optional properties: chipselect register and offset of that register. NOTE: TI QSPI controller requires different pinmux and IODelay -paramaters for Mode-0 and Mode-3 operations, which needs to be set up by +parameters for Mode-0 and Mode-3 operations, which needs to be set up by the bootloader (U-Boot). Default configuration only supports Mode-0 operation. Hence, "spi-cpol" and "spi-cpha" DT properties cannot be specified in the slave nodes of TI QSPI controller without appropriate diff --git a/Documentation/devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.txt b/Documentation/devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.txt index 27cfc7d7ccd7..8d6e4fd2468e 100644 --- a/Documentation/devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.txt +++ b/Documentation/devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.txt @@ -9,7 +9,7 @@ Required properties: one) - clocks: phandle to the source clock (usually the AHB clock) -Optionnal properties: +Optional properties: - resets: phandle to a reset controller asserting the timer Example: -- 2.20.1