From 75006b48bc73013dd2ef4fbac675ca6f8cb7963c Mon Sep 17 00:00:00 2001 From: Janghyuck Kim Date: Thu, 28 Jun 2018 17:29:58 +0900 Subject: [PATCH] [COMMON] media: scaler: apply 16 alignment for 2bit span Span value of 2 bit should be 16 aligned. Change-Id: Ibf26a8da49e14f7610f342596a4d87dbf303979f Signed-off-by: Janghyuck Kim --- drivers/media/platform/exynos/scaler/scaler-regs.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/media/platform/exynos/scaler/scaler-regs.c b/drivers/media/platform/exynos/scaler/scaler-regs.c index 0409bebabb6c..3442a2ab3c1b 100644 --- a/drivers/media/platform/exynos/scaler/scaler-regs.c +++ b/drivers/media/platform/exynos/scaler/scaler-regs.c @@ -870,8 +870,8 @@ static void sc_hwset_src_2bit_addr(struct sc_dev *sc, struct sc_frame *frame) writel(caddr_2bit, sc->regs + SCALER_SRC_2BIT_C_BASE); cfg &= ~(SCALER_SRC_2BIT_CSPAN_MASK | SCALER_SRC_2BIT_YSPAN_MASK); - cfg |= frame->width; - cfg |= (frame->width << frame->sc_fmt->cspan) << 16; + cfg |= ALIGN(frame->width, 16); + cfg |= (ALIGN(frame->width, 16) << frame->sc_fmt->cspan) << 16; writel(cfg, sc->regs + SCALER_SRC_2BIT_SPAN); } @@ -905,8 +905,8 @@ static void sc_hwset_dst_2bit_addr(struct sc_dev *sc, struct sc_frame *frame) writel(caddr_2bit, sc->regs + SCALER_DST_2BIT_C_BASE); cfg &= ~(SCALER_DST_2BIT_CSPAN_MASK | SCALER_DST_2BIT_YSPAN_MASK); - cfg |= frame->width; - cfg |= (frame->width << frame->sc_fmt->cspan) << 16; + cfg |= ALIGN(frame->width, 16); + cfg |= (ALIGN(frame->width, 16) << frame->sc_fmt->cspan) << 16; writel(cfg, sc->regs + SCALER_DST_2BIT_SPAN); } -- 2.20.1