From 742f8af6cb35cb07882ee13aed8d09d6f1b1f15c Mon Sep 17 00:00:00 2001 From: Vineet Gupta Date: Thu, 7 Nov 2013 14:47:16 +0530 Subject: [PATCH] ARC: [kbuild] Retire CONFIG_ARC_CPU_REL_4_10 Back when ARC700 4.10 was released, the related kernel features were tied to this config item so they could be disabled in one shot (i.e. LLOCK/SCOND, SWAPE, RTSC..) That having happened a while back, all new ARC customers weill get 4.11+ so those features can be assumed to be present and need not be tied to a top-level (we still retain the ability to individually disable them). Further, since ARCv2 also shares some of those feautes, removing it simplifies things a bit in Kconfig Signed-off-by: Vineet Gupta --- arch/arc/Kconfig | 11 +---------- 1 file changed, 1 insertion(+), 10 deletions(-) diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig index 91cac572ea89..a35d57a9f343 100644 --- a/arch/arc/Kconfig +++ b/arch/arc/Kconfig @@ -100,7 +100,7 @@ config ARC_CPU_750D config ARC_CPU_770 bool "ARC770" - select ARC_CPU_REL_4_10 + select ARC_HAS_SWAPE help Support for ARC770 core introduced with Rel 4.10 (Summer 2011) This core has a bunch of cool new features: @@ -302,13 +302,6 @@ config ARC_FPU_SAVE_RESTORE config ARC_CANT_LLSC def_bool n -menuconfig ARC_CPU_REL_4_10 - bool "Enable support for Rel 4.10 features" - default n - help - -ARC770 (and dependent features) enabled - -ARC750 also shares some of the new features with 770 - config ARC_HAS_LLSC bool "Insn: LLOCK/SCOND (efficient atomic ops)" default y @@ -317,12 +310,10 @@ config ARC_HAS_LLSC config ARC_HAS_SWAPE bool "Insn: SWAPE (endian-swap)" default y - depends on ARC_CPU_REL_4_10 config ARC_HAS_RTSC bool "Insn: RTSC (64-bit r/o cycle counter)" default y - depends on ARC_CPU_REL_4_10 depends on !SMP endmenu # "ARC CPU Configuration" -- 2.20.1