From 6bf7bd6967b1cdde1fe953b0edb951966799fb44 Mon Sep 17 00:00:00 2001 From: Russell King Date: Wed, 2 Nov 2005 14:11:35 +0000 Subject: [PATCH] [ARM] Fix mm initialisation with write buffered write allocate caches It seems that without the extra tlb flush, we may end up faulting during the early kernel initialisation because the TLB can't see the updated page tables. Signed-off-by: Russell King --- arch/arm/mm/init.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c index fd079ff1fc5..c168f322ef8 100644 --- a/arch/arm/mm/init.c +++ b/arch/arm/mm/init.c @@ -486,10 +486,17 @@ static void __init devicemaps_init(struct machine_desc *mdesc) /* * Ask the machine support to map in the statically mapped devices. - * After this point, we can start to touch devices again. */ if (mdesc->map_io) mdesc->map_io(); + + /* + * Finally flush the tlb again - this ensures that we're in a + * consistent state wrt the writebuffer if the writebuffer needs + * draining. After this point, we can start to touch devices + * again. + */ + local_flush_tlb_all(); } /* -- 2.20.1