From 69496e10f87cec182a9263046c1b251235b8c38e Mon Sep 17 00:00:00 2001 From: Ingo Molnar Date: Fri, 24 Apr 2015 08:48:01 +0200 Subject: [PATCH] x86/fpu: Print supported xstate features in human readable way Inform the user/admin about which xstate features the kernel supports. Reviewed-by: Borislav Petkov Cc: Andy Lutomirski Cc: Dave Hansen Cc: Fenghua Yu Cc: H. Peter Anvin Cc: Linus Torvalds Cc: Oleg Nesterov Cc: Peter Zijlstra Cc: Thomas Gleixner Signed-off-by: Ingo Molnar --- arch/x86/kernel/fpu/xsave.c | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/arch/x86/kernel/fpu/xsave.c b/arch/x86/kernel/fpu/xsave.c index bfe92f73bf86..f39882b7281b 100644 --- a/arch/x86/kernel/fpu/xsave.c +++ b/arch/x86/kernel/fpu/xsave.c @@ -482,6 +482,30 @@ static void __init setup_xstate_features(void) } while (1); } +static void print_xstate_feature(u64 xstate_mask, const char *desc) +{ + if (pcntxt_mask & xstate_mask) { + int xstate_feature = fls64(xstate_mask)-1; + + pr_info("x86/fpu: Supporting XSAVE feature %2d: '%s'\n", xstate_feature, desc); + } +} + +/* + * Print out all the supported xstate features: + */ +static void print_xstate_features(void) +{ + print_xstate_feature(XSTATE_FP, "x87 floating point registers"); + print_xstate_feature(XSTATE_SSE, "SSE registers"); + print_xstate_feature(XSTATE_YMM, "AVX registers"); + print_xstate_feature(XSTATE_BNDREGS, "MPX bounds registers"); + print_xstate_feature(XSTATE_BNDCSR, "MPX CSR"); + print_xstate_feature(XSTATE_OPMASK, "AVX-512 opmask"); + print_xstate_feature(XSTATE_ZMM_Hi256, "AVX-512 Hi256"); + print_xstate_feature(XSTATE_Hi16_ZMM, "AVX-512 ZMM_Hi256"); +} + /* * This function sets up offsets and sizes of all extended states in * xsave area. This supports both standard format and compacted format @@ -545,6 +569,7 @@ static void __init setup_init_fpu_buf(void) return; setup_xstate_features(); + print_xstate_features(); if (cpu_has_xsaves) { init_xstate_buf->xsave_hdr.xcomp_bv = -- 2.20.1