From 65013ffccd185ff5f2b0f73a8870f8409513599d Mon Sep 17 00:00:00 2001 From: Jiyu Yang Date: Mon, 23 Apr 2018 20:28:47 +0800 Subject: [PATCH] add check node for slt[1/3] PD#NONE Change-Id: Iabe5491ca2f6be5130566bda703dc16920acce13 --- .../midgard/backend/gpu/mali_kbase_jm_hw.c | 1 + .../drivers/gpu/arm/midgard/mali_kbase.h | 4 +-- .../drivers/gpu/arm/midgard/mali_kbase_jd.c | 8 +++-- .../midgard/platform/devicetree/meson_main2.h | 1 + .../arm/midgard/platform/devicetree/mpgpu.c | 31 +++++++++++++++++++ .../midgard/backend/gpu/mali_kbase_jm_hw.c | 1 + .../drivers/gpu/arm/midgard/mali_kbase.h | 4 +-- .../drivers/gpu/arm/midgard/mali_kbase_jd.c | 8 +++-- .../midgard/platform/devicetree/meson_main2.h | 1 + .../arm/midgard/platform/devicetree/mpgpu.c | 31 +++++++++++++++++++ 10 files changed, 80 insertions(+), 10 deletions(-) diff --git a/bifrost/r9p0/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_jm_hw.c b/bifrost/r9p0/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_jm_hw.c index 0a2a0b7..622b220 100644 --- a/bifrost/r9p0/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_jm_hw.c +++ b/bifrost/r9p0/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_jm_hw.c @@ -300,6 +300,7 @@ void kbase_job_done(struct kbase_device *kbdev, u32 done) BASE_JD_EVENT_TERMINATED; /* fall through */ default: + meson_gpu_data_invalid_count ++; dev_warn(kbdev->dev, "error detected from slot %d, job status 0x%08x (%s)", i, completion_code, kbase_exception_name diff --git a/bifrost/r9p0/kernel/drivers/gpu/arm/midgard/mali_kbase.h b/bifrost/r9p0/kernel/drivers/gpu/arm/midgard/mali_kbase.h index 11113a9..92bf1ac 100644 --- a/bifrost/r9p0/kernel/drivers/gpu/arm/midgard/mali_kbase.h +++ b/bifrost/r9p0/kernel/drivers/gpu/arm/midgard/mali_kbase.h @@ -607,5 +607,5 @@ int kbase_io_history_resize(struct kbase_io_history *h, u16 new_size); #endif - - +extern int meson_gpu_data_invalid_count; +extern int meson_gpu_fault; diff --git a/bifrost/r9p0/kernel/drivers/gpu/arm/midgard/mali_kbase_jd.c b/bifrost/r9p0/kernel/drivers/gpu/arm/midgard/mali_kbase_jd.c index aa545fd..721949e 100644 --- a/bifrost/r9p0/kernel/drivers/gpu/arm/midgard/mali_kbase_jd.c +++ b/bifrost/r9p0/kernel/drivers/gpu/arm/midgard/mali_kbase_jd.c @@ -1254,11 +1254,13 @@ void kbase_jd_done_worker(struct work_struct *data) return; } - if (katom->event_code != BASE_JD_EVENT_DONE) + if (katom->event_code != BASE_JD_EVENT_DONE) { + meson_gpu_fault ++; dev_err(kbdev->dev, "t6xx: GPU fault 0x%02lx from job slot %d\n", - (unsigned long)katom->event_code, - katom->slot_nr); + (unsigned long)katom->event_code, + katom->slot_nr); + } if (kbase_hw_has_issue(kbdev, BASE_HW_ISSUE_8316)) kbase_as_poking_timer_release_atom(kbdev, kctx, katom); diff --git a/bifrost/r9p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/meson_main2.h b/bifrost/r9p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/meson_main2.h index ca79752..dbce893 100644 --- a/bifrost/r9p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/meson_main2.h +++ b/bifrost/r9p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/meson_main2.h @@ -29,5 +29,6 @@ int mali_meson_uninit(struct platform_device* ptr_plt_dev); int mpgpu_class_init(void); void mpgpu_class_exit(void); void mali_gpu_utilization_callback(int utilization_pp); +u32 mpgpu_get_gpu_err_count(void); #endif /* MESON_MAIN_H_ */ diff --git a/bifrost/r9p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/mpgpu.c b/bifrost/r9p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/mpgpu.c index 0cc5035..d0a4c60 100644 --- a/bifrost/r9p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/mpgpu.c +++ b/bifrost/r9p0/kernel/drivers/gpu/arm/midgard/platform/devicetree/mpgpu.c @@ -26,8 +26,12 @@ #include #endif +//#include #include "meson_main2.h" +int meson_gpu_data_invalid_count = 0; +int meson_gpu_fault = 0; + static ssize_t domain_stat_read(struct class *class, struct class_attribute *attr, char *buf) { @@ -312,6 +316,32 @@ static ssize_t current_pp_write(struct class *class, } #endif +u32 mpgpu_get_gpu_err_count(void) +{ + return (meson_gpu_fault + meson_gpu_data_invalid_count); +} + +static ssize_t meson_gpu_get_err_count(struct class *class, + struct class_attribute *attr, char *buf) +{ + return sprintf(buf, "%d\n", mpgpu_get_gpu_err_count()); +} + +static ssize_t mpgpu_set_err_count(struct class *class, + struct class_attribute *attr, const char *buf, size_t count) +{ + int ret; + unsigned int val; + + ret = kstrtouint(buf, 10, &val); + if (0 != ret) + return -EINVAL; + + meson_gpu_fault = val; + + return count; +} + static struct class_attribute mali_class_attrs[] = { __ATTR(domain_stat, 0644, domain_stat_read, NULL), __ATTR(mpgpucmd, 0644, NULL, mpgpu_write), @@ -326,6 +356,7 @@ static struct class_attribute mali_class_attrs[] = { #if 0 __ATTR(cur_pp, 0644, current_pp_read, current_pp_write), #endif + __ATTR(gpu_err, 0644, meson_gpu_get_err_count, mpgpu_set_err_count), }; static struct class mpgpu_class = { diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_jm_hw.c b/dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_jm_hw.c index 331f6ee..05cf99a 100644 --- a/dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_jm_hw.c +++ b/dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_jm_hw.c @@ -305,6 +305,7 @@ void kbase_job_done(struct kbase_device *kbdev, u32 done) BASE_JD_EVENT_TERMINATED; /* fall through */ default: + meson_gpu_data_invalid_count ++; dev_warn(kbdev->dev, "error detected from slot %d, job status 0x%08x (%s)", i, completion_code, kbase_exception_name diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase.h b/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase.h index 7174ef2..1b431d3 100644 --- a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase.h +++ b/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase.h @@ -639,5 +639,5 @@ int kbase_io_history_resize(struct kbase_io_history *h, u16 new_size); #endif - - +extern int meson_gpu_data_invalid_count; +extern int meson_gpu_fault; diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_jd.c b/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_jd.c index 91cfee7..71450d5 100644 --- a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_jd.c +++ b/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_jd.c @@ -1270,11 +1270,13 @@ void kbase_jd_done_worker(struct work_struct *data) return; } - if (katom->event_code != BASE_JD_EVENT_DONE) + if (katom->event_code != BASE_JD_EVENT_DONE) { + meson_gpu_fault ++; dev_err(kbdev->dev, "t6xx: GPU fault 0x%02lx from job slot %d\n", - (unsigned long)katom->event_code, - katom->slot_nr); + (unsigned long)katom->event_code, + katom->slot_nr); + } if (kbase_hw_has_issue(kbdev, BASE_HW_ISSUE_8316)) kbase_as_poking_timer_release_atom(kbdev, kctx, katom); diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/platform/devicetree/meson_main2.h b/dvalin/kernel/drivers/gpu/arm/midgard/platform/devicetree/meson_main2.h index 018787c..65f8e14 100644 --- a/dvalin/kernel/drivers/gpu/arm/midgard/platform/devicetree/meson_main2.h +++ b/dvalin/kernel/drivers/gpu/arm/midgard/platform/devicetree/meson_main2.h @@ -33,5 +33,6 @@ void mali_gpu_utilization_callback(int utilization_pp); u32 mpgpu_get_utilization(void); u32 mpgpu_get_util_gl_share(void); u32 mpgpu_get_util_cl_share(u32 *util); +u32 mpgpu_get_gpu_err_count(void); #endif /* MESON_MAIN_H_ */ diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/platform/devicetree/mpgpu.c b/dvalin/kernel/drivers/gpu/arm/midgard/platform/devicetree/mpgpu.c index 4e294d9..831ae72 100644 --- a/dvalin/kernel/drivers/gpu/arm/midgard/platform/devicetree/mpgpu.c +++ b/dvalin/kernel/drivers/gpu/arm/midgard/platform/devicetree/mpgpu.c @@ -26,8 +26,12 @@ #include #endif +//#include #include "meson_main2.h" +int meson_gpu_data_invalid_count = 0; +int meson_gpu_fault = 0; + static ssize_t domain_stat_read(struct class *class, struct class_attribute *attr, char *buf) { @@ -239,6 +243,32 @@ static ssize_t util_cl_share_read(struct class *class, return sprintf(buf, "%d %d\n", val[0], val[1]); } +u32 mpgpu_get_gpu_err_count(void) +{ + return (meson_gpu_fault + meson_gpu_data_invalid_count); +} + +static ssize_t meson_gpu_get_err_count(struct class *class, + struct class_attribute *attr, char *buf) +{ + return sprintf(buf, "%d\n", mpgpu_get_gpu_err_count()); +} + +static ssize_t mpgpu_set_err_count(struct class *class, + struct class_attribute *attr, const char *buf, size_t count) +{ + int ret; + unsigned int val; + + ret = kstrtouint(buf, 10, &val); + if (0 != ret) + return -EINVAL; + + meson_gpu_fault = val; + + return count; +} + static struct class_attribute mali_class_attrs[] = { __ATTR(domain_stat, 0644, domain_stat_read, NULL), __ATTR(mpgpucmd, 0644, NULL, mpgpu_write), @@ -249,6 +279,7 @@ static struct class_attribute mali_class_attrs[] = { __ATTR(utilization, 0644, utilization_read, NULL), __ATTR(util_gl, 0644, util_gl_share_read, NULL), __ATTR(util_cl, 0644, util_cl_share_read, NULL), + __ATTR(gpu_err, 0644, meson_gpu_get_err_count, mpgpu_set_err_count), }; static struct class mpgpu_class = { -- 2.20.1