From 644848af96846adc3c81fdbb1cb7da2836316ec2 Mon Sep 17 00:00:00 2001 From: Emrys Bayliss Date: Fri, 16 Jan 2015 03:29:23 +1100 Subject: [PATCH] Staging: vt6655: comment after statement formatting This patch makes the formatting of the comments in mac.h more consistent. * Where a comment follows a statement, it is separated by a single space. Signed-off-by: Emrys Bayliss Signed-off-by: Greg Kroah-Hartman --- drivers/staging/vt6655/mac.h | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/drivers/staging/vt6655/mac.h b/drivers/staging/vt6655/mac.h index 359e3f2abff5..f29fe307fa87 100644 --- a/drivers/staging/vt6655/mac.h +++ b/drivers/staging/vt6655/mac.h @@ -336,12 +336,12 @@ // #define HOSTCR_TXONST 0x80 #define HOSTCR_RXONST 0x40 -#define HOSTCR_ADHOC 0x20 // Network Type 1 = Ad-hoc -#define HOSTCR_AP 0x10 // Port Type 1 = AP -#define HOSTCR_TXON 0x08 //0000 1000 -#define HOSTCR_RXON 0x04 //0000 0100 -#define HOSTCR_MACEN 0x02 //0000 0010 -#define HOSTCR_SOFTRST 0x01 //0000 0001 +#define HOSTCR_ADHOC 0x20 // Network Type 1 = Ad-hoc +#define HOSTCR_AP 0x10 // Port Type 1 = AP +#define HOSTCR_TXON 0x08 //0000 1000 +#define HOSTCR_RXON 0x04 //0000 0100 +#define HOSTCR_MACEN 0x02 //0000 0010 +#define HOSTCR_SOFTRST 0x01 //0000 0001 // // Bits in the MACCR register @@ -371,7 +371,7 @@ // Bits in the TCR register // #define TCR_SYNCDCFOPT 0x02 -#define TCR_AUTOBCNTX 0x01 // Beacon automatically transmit enable +#define TCR_AUTOBCNTX 0x01 // Beacon automatically transmit enable // // Bits in the IMR register @@ -381,7 +381,7 @@ #define IMR_RADARDETECT 0x10000000 #define IMR_MEASUREEND 0x08000000 #define IMR_SOFTTIMER1 0x00200000 -#define IMR_RXDMA1 0x00001000 //0000 0000 0001 0000 0000 0000 +#define IMR_RXDMA1 0x00001000 //0000 0000 0001 0000 0000 0000 #define IMR_RXNOBUF 0x00000800 #define IMR_MIBNEARFULL 0x00000400 #define IMR_SOFTINT 0x00000200 @@ -404,9 +404,9 @@ #define ISR_RADARDETECT 0x10000000 #define ISR_MEASUREEND 0x08000000 #define ISR_SOFTTIMER1 0x00200000 -#define ISR_RXDMA1 0x00001000 //0000 0000 0001 0000 0000 0000 -#define ISR_RXNOBUF 0x00000800 //0000 0000 0000 1000 0000 0000 -#define ISR_MIBNEARFULL 0x00000400 //0000 0000 0000 0100 0000 0000 +#define ISR_RXDMA1 0x00001000 //0000 0000 0001 0000 0000 0000 +#define ISR_RXNOBUF 0x00000800 //0000 0000 0000 1000 0000 0000 +#define ISR_MIBNEARFULL 0x00000400 //0000 0000 0000 0100 0000 0000 #define ISR_SOFTINT 0x00000200 #define ISR_FETALERR 0x00000100 #define ISR_WATCHDOG 0x00000080 @@ -603,7 +603,7 @@ #define W_MAX_TIMEOUT 0xFFF0U // wait time within loop -#define CB_DELAY_LOOP_WAIT 10 // 10ms +#define CB_DELAY_LOOP_WAIT 10 // 10ms // // revision id -- 2.20.1