From 60767abcea3dd1d47a4bd38398e1e8c1864975eb Mon Sep 17 00:00:00 2001 From: "guneshwor.o.singh@intel.com" Date: Fri, 28 Jul 2017 16:12:13 +0530 Subject: [PATCH] ASoC: Intel: Skylake: Reset the controller in probe Controller can be in reset state by default. Capability structure traversal requires the controller to be out of reset else it results in broken capability parsing. Hence make sure that controller is out of reset before parsing capabilities by doing a full reset. Signed-off-by: Guneshwor Singh Acked-By: Vinod Koul Signed-off-by: Mark Brown --- sound/soc/intel/skylake/skl.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/sound/soc/intel/skylake/skl.c b/sound/soc/intel/skylake/skl.c index 01a2dd6518a4..b9e1310673f0 100644 --- a/sound/soc/intel/skylake/skl.c +++ b/sound/soc/intel/skylake/skl.c @@ -702,6 +702,8 @@ static int skl_first_init(struct hdac_ext_bus *ebus) return -ENXIO; } + skl_init_chip(bus, true); + snd_hdac_bus_parse_capabilities(bus); if (skl_acquire_irq(ebus, 0) < 0) -- 2.20.1