From 5f7e8028c7946fd676a5a6043c252070f110dd74 Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Thu, 25 Feb 2016 10:03:13 +1000 Subject: [PATCH] drm/nouveau/gr/gm200: switch over to using sw_nonctx from firmware Signed-off-by: Ben Skeggs --- .../gpu/drm/nouveau/nvkm/engine/gr/gf100.h | 2 - .../gpu/drm/nouveau/nvkm/engine/gr/gm200.c | 202 +----------------- .../gpu/drm/nouveau/nvkm/engine/gr/gm206.c | 1 - 3 files changed, 1 insertion(+), 204 deletions(-) diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h index 5626cae67291..f0c6acb0f8fd 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h +++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h @@ -287,6 +287,4 @@ extern const struct gf100_gr_init gm107_gr_init_l1c_0[]; extern const struct gf100_gr_init gm107_gr_init_wwdx_0[]; extern const struct gf100_gr_init gm107_gr_init_cbm_0[]; void gm107_gr_init_bios(struct gf100_gr *); - -extern const struct gf100_gr_pack gm200_gr_pack_mmio[]; #endif diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gm200.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gm200.c index 2eecc6f6889f..058fc1d22c09 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gm200.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gm200.c @@ -28,205 +28,6 @@ #include -/******************************************************************************* - * PGRAPH register lists - ******************************************************************************/ - -static const struct gf100_gr_init -gm200_gr_init_main_0[] = { - { 0x400080, 1, 0x04, 0x003003e2 }, - { 0x400088, 1, 0x04, 0xe007bfe7 }, - { 0x40008c, 1, 0x04, 0x00060000 }, - { 0x400090, 1, 0x04, 0x00000030 }, - { 0x40013c, 1, 0x04, 0x003901f3 }, - { 0x400140, 1, 0x04, 0x00000100 }, - { 0x400144, 1, 0x04, 0x00000000 }, - { 0x400148, 1, 0x04, 0x00000110 }, - { 0x400138, 1, 0x04, 0x00000000 }, - { 0x400130, 2, 0x04, 0x00000000 }, - { 0x400124, 1, 0x04, 0x00000002 }, - {} -}; - -static const struct gf100_gr_init -gm200_gr_init_fe_0[] = { - { 0x40415c, 1, 0x04, 0x00000000 }, - { 0x404170, 1, 0x04, 0x00000000 }, - { 0x4041b4, 1, 0x04, 0x00000000 }, - { 0x4041b8, 1, 0x04, 0x00000010 }, - {} -}; - -static const struct gf100_gr_init -gm200_gr_init_ds_0[] = { - { 0x40583c, 1, 0x04, 0x00000000 }, - { 0x405844, 1, 0x04, 0x00ffffff }, - { 0x40584c, 1, 0x04, 0x00000001 }, - { 0x405850, 1, 0x04, 0x00000000 }, - { 0x405900, 1, 0x04, 0x00000000 }, - { 0x405908, 1, 0x04, 0x00000000 }, - {} -}; - -static const struct gf100_gr_init -gm200_gr_init_sked_0[] = { - { 0x407010, 1, 0x04, 0x00000000 }, - { 0x407040, 1, 0x04, 0x80440434 }, - { 0x407048, 1, 0x04, 0x00000008 }, - {} -}; - -static const struct gf100_gr_init -gm200_gr_init_tpccs_0[] = { - { 0x419d60, 1, 0x04, 0x0000003f }, - { 0x419d88, 3, 0x04, 0x00000000 }, - { 0x419dc4, 1, 0x04, 0x00000000 }, - { 0x419dc8, 1, 0x04, 0x00000501 }, - { 0x419dd0, 1, 0x04, 0x00000000 }, - { 0x419dd4, 1, 0x04, 0x00000100 }, - { 0x419dd8, 1, 0x04, 0x00000001 }, - { 0x419ddc, 1, 0x04, 0x00000002 }, - { 0x419de0, 1, 0x04, 0x00000001 }, - { 0x419de8, 1, 0x04, 0x000000cc }, - { 0x419dec, 1, 0x04, 0x00000000 }, - { 0x419df0, 1, 0x04, 0x000000cc }, - { 0x419df4, 1, 0x04, 0x00000000 }, - { 0x419d0c, 1, 0x04, 0x00000000 }, - { 0x419d10, 1, 0x04, 0x00000014 }, - {} -}; - -static const struct gf100_gr_init -gm200_gr_init_pe_0[] = { - { 0x419900, 1, 0x04, 0x000000ff }, - { 0x419810, 1, 0x04, 0x00000000 }, - { 0x41980c, 1, 0x04, 0x00000010 }, - { 0x419844, 1, 0x04, 0x00000000 }, - { 0x419838, 1, 0x04, 0x000000ff }, - { 0x419850, 1, 0x04, 0x00000004 }, - { 0x419854, 2, 0x04, 0x00000000 }, - { 0x419894, 3, 0x04, 0x00100401 }, - {} -}; - -static const struct gf100_gr_init -gm200_gr_init_sm_0[] = { - { 0x419e30, 1, 0x04, 0x000000ff }, - { 0x419e00, 1, 0x04, 0x00000000 }, - { 0x419ea0, 1, 0x04, 0x00000000 }, - { 0x419ee4, 1, 0x04, 0x00000000 }, - { 0x419ea4, 1, 0x04, 0x00000100 }, - { 0x419ea8, 1, 0x04, 0x00000000 }, - { 0x419ee8, 1, 0x04, 0x00000091 }, - { 0x419eb4, 1, 0x04, 0x00000000 }, - { 0x419ebc, 2, 0x04, 0x00000000 }, - { 0x419edc, 1, 0x04, 0x000c1810 }, - { 0x419ed8, 1, 0x04, 0x00000000 }, - { 0x419ee0, 1, 0x04, 0x00000000 }, - {} -}; - -static const struct gf100_gr_init -gm200_gr_init_l1c_1[] = { - { 0x419cf8, 2, 0x04, 0x00000000 }, - {} -}; - -static const struct gf100_gr_init -gm200_gr_init_sm_1[] = { - { 0x419f74, 1, 0x04, 0x00055155 }, - { 0x419f80, 4, 0x04, 0x00000000 }, - {} -}; - -static const struct gf100_gr_init -gm200_gr_init_l1c_2[] = { - { 0x419ccc, 2, 0x04, 0x00000000 }, - { 0x419c80, 1, 0x04, 0x3f006022 }, - { 0x419c88, 1, 0x04, 0x00210000 }, - {} -}; - -static const struct gf100_gr_init -gm200_gr_init_pes_0[] = { - { 0x41be50, 1, 0x04, 0x000000ff }, - { 0x41be04, 1, 0x04, 0x00000000 }, - { 0x41be08, 1, 0x04, 0x00000004 }, - { 0x41be0c, 1, 0x04, 0x00000008 }, - { 0x41be10, 1, 0x04, 0x2e3b8bc7 }, - { 0x41be14, 2, 0x04, 0x00000000 }, - { 0x41be3c, 5, 0x04, 0x00100401 }, - {} -}; - -static const struct gf100_gr_init -gm200_gr_init_be_0[] = { - { 0x408890, 1, 0x04, 0x000000ff }, - { 0x40880c, 1, 0x04, 0x00000000 }, - { 0x408850, 1, 0x04, 0x00000004 }, - { 0x408878, 1, 0x04, 0x01b4201c }, - { 0x40887c, 1, 0x04, 0x80004c55 }, - { 0x408880, 1, 0x04, 0x0018c258 }, - { 0x408884, 1, 0x04, 0x0000160f }, - { 0x408974, 1, 0x04, 0x000000ff }, - { 0x408910, 9, 0x04, 0x00000000 }, - { 0x408950, 1, 0x04, 0x00000000 }, - { 0x408954, 1, 0x04, 0x0000ffff }, - { 0x408958, 1, 0x04, 0x00000034 }, - { 0x40895c, 1, 0x04, 0x84b17403 }, - { 0x408960, 1, 0x04, 0x04c1884f }, - { 0x408964, 1, 0x04, 0x04714445 }, - { 0x408968, 1, 0x04, 0x0280802f }, - { 0x40896c, 1, 0x04, 0x04304856 }, - { 0x408970, 1, 0x04, 0x00012800 }, - { 0x408984, 1, 0x04, 0x00000000 }, - { 0x408988, 1, 0x04, 0x08040201 }, - { 0x40898c, 1, 0x04, 0x80402010 }, - {} -}; - -const struct gf100_gr_pack -gm200_gr_pack_mmio[] = { - { gm200_gr_init_main_0 }, - { gm200_gr_init_fe_0 }, - { gf100_gr_init_pri_0 }, - { gf100_gr_init_rstr2d_0 }, - { gf100_gr_init_pd_0 }, - { gm200_gr_init_ds_0 }, - { gm107_gr_init_scc_0 }, - { gm200_gr_init_sked_0 }, - { gk110_gr_init_cwd_0 }, - { gm107_gr_init_prop_0 }, - { gk208_gr_init_gpc_unk_0 }, - { gf100_gr_init_setup_0 }, - { gf100_gr_init_crstr_0 }, - { gm107_gr_init_setup_1 }, - { gm107_gr_init_zcull_0 }, - { gf100_gr_init_gpm_0 }, - { gm107_gr_init_gpc_unk_1 }, - { gf100_gr_init_gcc_0 }, - { gm200_gr_init_tpccs_0 }, - { gm107_gr_init_tex_0 }, - { gm200_gr_init_pe_0 }, - { gm107_gr_init_l1c_0 }, - { gf100_gr_init_mpc_0 }, - { gm200_gr_init_sm_0 }, - { gm200_gr_init_l1c_1 }, - { gm200_gr_init_sm_1 }, - { gm200_gr_init_l1c_2 }, - { gm200_gr_init_pes_0 }, - { gm107_gr_init_wwdx_0 }, - { gm107_gr_init_cbm_0 }, - { gm200_gr_init_be_0 }, - {} -}; - -const struct gf100_gr_pack * -gm200_gr_data[] = { - gm200_gr_pack_mmio, - NULL -}; - /******************************************************************************* * PGRAPH engine/subdev functions ******************************************************************************/ @@ -254,7 +55,7 @@ gm200_gr_init(struct gf100_gr *gr) nvkm_wr32(device, 0x100ccc, nvkm_memory_addr(gr->unk4188b8) >> 8); nvkm_mask(device, 0x100cc4, 0x00040000, 0x00040000); - gf100_gr_mmio(gr, gr->func->mmio); + gf100_gr_mmio(gr, gr->fuc_sw_nonctx); gm107_gr_init_bios(gr); @@ -388,7 +189,6 @@ gm200_gr_new_(const struct gf100_gr_func *func, struct nvkm_device *device, static const struct gf100_gr_func gm200_gr = { .init = gm200_gr_init, - .mmio = gm200_gr_pack_mmio, .ppc_nr = 2, .grctx = &gm200_grctx, .sclass = { diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gm206.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gm206.c index 74c4f7384ff6..fa2ab8c5f96b 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gm206.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gm206.c @@ -29,7 +29,6 @@ static const struct gf100_gr_func gm206_gr = { .init = gm200_gr_init, - .mmio = gm200_gr_pack_mmio, .ppc_nr = 2, .grctx = &gm206_grctx, .sclass = { -- 2.20.1