From 58c6990c5ee772c2551193f053e51a52b9984b49 Mon Sep 17 00:00:00 2001 From: Shawn Lin Date: Fri, 23 Sep 2016 10:05:59 +0800 Subject: [PATCH] PCI: rockchip: Improve the deassert sequence of four reset pins Per TRM, we need to deassert the four reset pins simultaneously. Currently the reset framework doesn't support that so we did it one by one. It seems no side effect found but it does impact the state machine of controller, so sometimes the change speed bit is not set when sending training sequence from recover state. After the silicon RTL review from SoC guys, we don't need to do the sequence recommended by TRM, and could just move the deassert of mgmt_sticky_rst to the first place. Signed-off-by: Shawn Lin Signed-off-by: Bjorn Helgaas --- drivers/pci/host/pcie-rockchip.c | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c index 91f6fa281149..43b765e3ce80 100644 --- a/drivers/pci/host/pcie-rockchip.c +++ b/drivers/pci/host/pcie-rockchip.c @@ -449,21 +449,25 @@ static int rockchip_pcie_init_port(struct rockchip_pcie *rockchip) return err; } - err = reset_control_deassert(rockchip->core_rst); + /* + * Please don't reorder the deassert sequence of the following + * four reset pins. + */ + err = reset_control_deassert(rockchip->mgmt_sticky_rst); if (err) { - dev_err(dev, "deassert core_rst err %d\n", err); + dev_err(dev, "deassert mgmt_sticky_rst err %d\n", err); return err; } - err = reset_control_deassert(rockchip->mgmt_rst); + err = reset_control_deassert(rockchip->core_rst); if (err) { - dev_err(dev, "deassert mgmt_rst err %d\n", err); + dev_err(dev, "deassert core_rst err %d\n", err); return err; } - err = reset_control_deassert(rockchip->mgmt_sticky_rst); + err = reset_control_deassert(rockchip->mgmt_rst); if (err) { - dev_err(dev, "deassert mgmt_sticky_rst err %d\n", err); + dev_err(dev, "deassert mgmt_rst err %d\n", err); return err; } -- 2.20.1