From 56ec1ddcff967e51d98427e4efcbfc90de67efe3 Mon Sep 17 00:00:00 2001 From: Glauber de Oliveira Costa Date: Wed, 30 Jan 2008 13:31:07 +0100 Subject: [PATCH] x86: make fixups wordsize agnostic This patch uses the _ASM_ALIGN and _ASM_PTR macros to make the fixups in native_read/write_msr_safe look the same for x86_64 and i386. Besides using this macros, we also have to take the explicit instruction suffixes out. It's okay because all this instructions uses registers, and can be sized by them. Signed-off-by: Glauber de Oliveira Costa Signed-off-by: Ingo Molnar Signed-off-by: Thomas Gleixner --- include/asm-x86/msr.h | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) diff --git a/include/asm-x86/msr.h b/include/asm-x86/msr.h index cb7222358897..792fde2e8908 100644 --- a/include/asm-x86/msr.h +++ b/include/asm-x86/msr.h @@ -33,6 +33,7 @@ static inline unsigned long long native_read_tscp(int *aux) #ifdef __KERNEL__ #ifndef __ASSEMBLY__ +#include #include static inline unsigned long long native_read_msr(unsigned int msr) @@ -48,14 +49,14 @@ static inline unsigned long long native_read_msr_safe(unsigned int msr, { unsigned long long val; - asm volatile("2: rdmsr ; xorl %0,%0\n" + asm volatile("2: rdmsr ; xor %0,%0\n" "1:\n\t" ".section .fixup,\"ax\"\n\t" - "3: movl %3,%0 ; jmp 1b\n\t" + "3: mov %3,%0 ; jmp 1b\n\t" ".previous\n\t" ".section __ex_table,\"a\"\n" - " .align 4\n\t" - " .long 2b,3b\n\t" + _ASM_ALIGN "\n\t" + _ASM_PTR " 2b,3b\n\t" ".previous" : "=r" (*err), "=A" (val) : "c" (msr), "i" (-EFAULT)); @@ -73,14 +74,14 @@ static inline int native_write_msr_safe(unsigned int msr, unsigned low, unsigned high) { int err; - asm volatile("2: wrmsr ; xorl %0,%0\n" + asm volatile("2: wrmsr ; xor %0,%0\n" "1:\n\t" ".section .fixup,\"ax\"\n\t" - "3: movl %4,%0 ; jmp 1b\n\t" + "3: mov %4,%0 ; jmp 1b\n\t" ".previous\n\t" ".section __ex_table,\"a\"\n" - " .align 4\n\t" - " .long 2b,3b\n\t" + _ASM_ALIGN "\n\t" + _ASM_PTR " 2b,3b\n\t" ".previous" : "=a" (err) : "c" (msr), "0" (low), "d" (high), -- 2.20.1