From 51f1f1cb24b870db44edcab56ffd89ecf8ce09e8 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 24 Apr 2014 10:05:38 +0200 Subject: [PATCH] mfd: sec-core: Update sec_pmic documentation Update the documentation for sec_pmic state container structure to reflect current code. Signed-off-by: Krzysztof Kozlowski Signed-off-by: Lee Jones --- include/linux/mfd/samsung/core.h | 29 +++++++++++++++++------------ 1 file changed, 17 insertions(+), 12 deletions(-) diff --git a/include/linux/mfd/samsung/core.h b/include/linux/mfd/samsung/core.h index 84aaf6c25794..1c66a6462887 100644 --- a/include/linux/mfd/samsung/core.h +++ b/include/linux/mfd/samsung/core.h @@ -24,18 +24,23 @@ enum sec_device_type { }; /** - * struct sec_pmic_dev - s5m87xx master device for sub-drivers - * @dev: master device of the chip (can be used to access platform data) - * @pdata: pointer to private data used to pass platform data to child - * @i2c: i2c client private data for regulator - * @iolock: mutex for serializing io access - * @irqlock: mutex for buslock - * @irq_base: base IRQ number for sec-pmic, required for IRQs - * @irq: generic IRQ number for s5m87xx - * @ono: power onoff IRQ number for s5m87xx - * @irq_masks_cur: currently active value - * @irq_masks_cache: cached hardware value - * @type: indicate which s5m87xx "variant" is used + * struct sec_pmic_dev - s2m/s5m master device for sub-drivers + * @dev: Master device of the chip + * @pdata: Platform data populated with data from DTS + * or board files + * @regmap_pmic: Regmap associated with PMIC's I2C address + * @i2c: I2C client of the main driver + * @device_type: Type of device, matches enum sec_device_type + * @irq_base: Base IRQ number for device, required for IRQs + * @irq: Generic IRQ number for device + * @irq_data: Runtime data structure for IRQ controller + * @ono: Power onoff IRQ number for s5m87xx + * @wakeup: Whether or not this is a wakeup device + * @wtsr_smpl: Whether or not to enable in RTC driver the Watchdog + * Timer Software Reset (registers set to default value + * after PWRHOLD falling) and Sudden Momentary Power Loss + * (PMIC will enter power on sequence after short drop in + * VBATT voltage). */ struct sec_pmic_dev { struct device *dev; -- 2.20.1