From 4ffb13d019eae8f47b13ca39f93d153631712779 Mon Sep 17 00:00:00 2001 From: Kim Manseok Date: Fri, 28 Sep 2018 13:16:56 +0900 Subject: [PATCH] [9610] fbdev: dpu20: Add new panel for multi panel solution Change-Id: I9ce718e4df242f7c2603bfc427b461e5e1d5b0b8 Signed-off-by: Kim Manseok --- .../dts/exynos/exynos9610-display-lcd.dtsi | 36 +++ drivers/video/fbdev/exynos/dpu20/dsim.h | 1 + drivers/video/fbdev/exynos/dpu20/dsim_drv.c | 9 + .../video/fbdev/exynos/dpu20/panels/Makefile | 3 +- .../fbdev/exynos/dpu20/panels/lcd_ctrl.h | 11 + .../exynos/dpu20/panels/nt36672a_lcd_ctrl.c | 130 +++++++++++ .../exynos/dpu20/panels/nt36672a_mipi_lcd.c | 207 ++++++++++++++++++ .../exynos/dpu20/panels/nt36672a_param.h | 44 ++++ 8 files changed, 440 insertions(+), 1 deletion(-) create mode 100644 drivers/video/fbdev/exynos/dpu20/panels/nt36672a_lcd_ctrl.c create mode 100644 drivers/video/fbdev/exynos/dpu20/panels/nt36672a_mipi_lcd.c create mode 100644 drivers/video/fbdev/exynos/dpu20/panels/nt36672a_param.h diff --git a/arch/arm64/boot/dts/exynos/exynos9610-display-lcd.dtsi b/arch/arm64/boot/dts/exynos/exynos9610-display-lcd.dtsi index fb85f58f0db2..f8795b5d643e 100644 --- a/arch/arm64/boot/dts/exynos/exynos9610-display-lcd.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos9610-display-lcd.dtsi @@ -254,6 +254,42 @@ hdr_max_avg_luma = <1200000>; /* 120 */ hdr_min_luma = <5>; /* 0.0005 */ }; + + nt36672a: nt36672a { + device_type = "novatek-nt36672a"; + mode = <0>; /* 0: video mode, 1: DP command mode, 2: MIPI command mode */ + resolution = <1080 2246>; + size = <80 120>; + timing,refresh = <60>; + timing,h-porch = <20 40 40>; + timing,v-porch = <2 10 10>; + timing,dsi-hs-clk = <1300>; + /* TODO : pms value to be set */ + timing,pmsk = <1 100 1 0>; + timing,dsi-escape-clk = <20>; + mic_en = <0>; /* 0: Disable, 1: Enable */ + mic_ratio = <0>; /* 0: 1/2 mic, 1: 1/3 mic */ + mic_ver = <0>; /* 0: mic v1.1, 1: v1.2, 2: v2.0 */ + type_of_ddi = <2>; /* 0: Samsung Mobile, 1: MAGNA, 2: Normal(Etc) */ + dsc_en = <0>; /* 0: Disable, 1: Enable */ + dsc_cnt = <0>; /* used DSC count */ + dsc_slice_num = <0>; /* count of dsc slice */ + data_lane = <4>; /* number of using data lane */ + cmd_underrun_lp_ref = <4942>; /* for underrun detect at command mode*/ + vt_compensation = <14>; /* for underrun detect at video mode*/ + mres_en = <0>; + mres_number = <3>; + mres_width = <1440 1080 720>; + mres_height = <2960 2220 1480>; + mres_dsc_width = <720 540 360>; + mres_dsc_height = <40 30 74>; + mres_dsc_en = <1 1 0>; + hdr_num = <1>; /* max: 4 */ + hdr_type = <2 0 0 0>; /* 1: DOLBY_VISION, 2: HDR10, 3: HLG */ + hdr_max_luma = <5400000>; /* 540 */ + hdr_max_avg_luma = <1200000>; /* 120 */ + hdr_min_luma = <5>; /* 0.0005 */ + }; }; }; }; diff --git a/drivers/video/fbdev/exynos/dpu20/dsim.h b/drivers/video/fbdev/exynos/dpu20/dsim.h index bdcc70c23d66..20c9288ea4fa 100644 --- a/drivers/video/fbdev/exynos/dpu20/dsim.h +++ b/drivers/video/fbdev/exynos/dpu20/dsim.h @@ -79,6 +79,7 @@ extern struct dsim_lcd_driver s6e3ha8_mipi_lcd_driver; extern struct dsim_lcd_driver s6e3aa2_mipi_lcd_driver; extern struct dsim_lcd_driver s6e3fa0_mipi_lcd_driver; extern struct dsim_lcd_driver s6e3fa7_mipi_lcd_driver; +extern struct dsim_lcd_driver nt36672a_mipi_lcd_driver; /* define video timer interrupt */ enum { diff --git a/drivers/video/fbdev/exynos/dpu20/dsim_drv.c b/drivers/video/fbdev/exynos/dpu20/dsim_drv.c index d1f8b8ce2c66..4434baa61f86 100644 --- a/drivers/video/fbdev/exynos/dpu20/dsim_drv.c +++ b/drivers/video/fbdev/exynos/dpu20/dsim_drv.c @@ -1308,6 +1308,11 @@ static void dsim_parse_lcd_info(struct dsim_device *dsim) dsim_info("ddi type : %s\n", ddi_device_type); break; + case 0xff216102: + ddi_device_type = "novatek-nt36672a"; + dsim_info("ddi type : %s\n", ddi_device_type); + break; + default: dsim_info("can't read ddi_device_type\n"); BUG(); @@ -1531,6 +1536,10 @@ static void dsim_register_panel(struct dsim_device *dsim) dsim->panel_ops = &s6e3fa0_mipi_lcd_driver; dsim_info("panel ops : s6e3fa0_mipi_lcd_driver\n"); break; + case 0xff216102: + dsim->panel_ops = &nt36672a_mipi_lcd_driver; + dsim_info("panel ops : nt36672a_mipi_lcd_driver\n"); + break; default: dsim_info("panel ops is not bind\n"); BUG(); diff --git a/drivers/video/fbdev/exynos/dpu20/panels/Makefile b/drivers/video/fbdev/exynos/dpu20/panels/Makefile index 5147f2e9b862..a7f90570ff05 100644 --- a/drivers/video/fbdev/exynos/dpu20/panels/Makefile +++ b/drivers/video/fbdev/exynos/dpu20/panels/Makefile @@ -1,4 +1,5 @@ -obj-$(CONFIG_EXYNOS_DECON_LCD_MULTI) += s6e3fa0_mipi_lcd.o s6e3fa0_lcd_ctrl.o +obj-$(CONFIG_EXYNOS_DECON_LCD_MULTI) += s6e3fa0_mipi_lcd.o s6e3fa0_lcd_ctrl.o \ + nt36672a_mipi_lcd.o nt36672a_lcd_ctrl.o obj-$(CONFIG_EXYNOS_DECON_LCD_S6E3HA2K) += s6e3ha2k_mipi_lcd.o s6e3ha2k_lcd_ctrl.o obj-$(CONFIG_EXYNOS_DECON_LCD_S6E3HF4) += s6e3hf4_mipi_lcd.o s6e3hf4_lcd_ctrl.o obj-$(CONFIG_EXYNOS_DECON_LCD_S6E3HA6) += s6e3ha6_mipi_lcd.o s6e3ha6_lcd_ctrl.o diff --git a/drivers/video/fbdev/exynos/dpu20/panels/lcd_ctrl.h b/drivers/video/fbdev/exynos/dpu20/panels/lcd_ctrl.h index 91a05fc811e0..92ddd9bb383b 100644 --- a/drivers/video/fbdev/exynos/dpu20/panels/lcd_ctrl.h +++ b/drivers/video/fbdev/exynos/dpu20/panels/lcd_ctrl.h @@ -25,4 +25,15 @@ int s6e3fa0_lcd_dump(int id); void s6e3fa0_lcd_mres(int id, int mres_idx, int dsc_en); void s6e3fa0_lcd_lane_ctl(int id, unsigned int lane_num); +void nt36672a_lcd_init(int id, struct decon_lcd *lcd); +void nt36672a_lcd_enable(int id); +void nt36672a_lcd_disable(int id); +void nt36672a_lcd_sleepin(int id); +void nt36672a_lcd_sleepout(int id); +int nt36672a_lcd_gamma_ctrl(int id, unsigned int backlightlevel); +int nt36672a_lcd_gamma_update(int id); +int nt36672a_lcd_dump(int id); +void nt36672a_lcd_mres(int id, int mres_idx, int dsc_en); +void nt36672a_lcd_lane_ctl(int id, unsigned int lane_num); + #endif /* __LCD_CTRL_H__ */ diff --git a/drivers/video/fbdev/exynos/dpu20/panels/nt36672a_lcd_ctrl.c b/drivers/video/fbdev/exynos/dpu20/panels/nt36672a_lcd_ctrl.c new file mode 100644 index 000000000000..4913b3921cb5 --- /dev/null +++ b/drivers/video/fbdev/exynos/dpu20/panels/nt36672a_lcd_ctrl.c @@ -0,0 +1,130 @@ +/* drivers/video/exynos/panels/nt36672a_lcd_ctrl.c + * + * Samsung SoC MIPI LCD CONTROL functions + * + * Copyright (c) 2018 Samsung Electronics + * + * Hwangjae Lee, + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ +#include "nt36672a_param.h" +#include "lcd_ctrl.h" + +/* use FW_TEST definition when you test CAL on firmware */ +/* #define FW_TEST */ +#ifdef FW_TEST +#include "../dsim_fw.h" +#include "mipi_display.h" +#else +#include "../dsim.h" +#include