From 4d04391cfe6446fb2f184d063b56a4dcce425334 Mon Sep 17 00:00:00 2001 From: Dinh Nguyen Date: Thu, 24 Oct 2013 03:18:30 -0500 Subject: [PATCH] clk: socfpga: Remove check for "reg" property in socfpga_clk_init The function socfpga_clk_init() can support clocks that do not have a divider register, but a fixed-divider that can be read from DTS. Therefore, the "reg" property is not a failing condition for socfpga_clk_init(). Signed-off-by: Dinh Nguyen Signed-off-by: Mike Turquette --- drivers/clk/socfpga/clk.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/clk/socfpga/clk.c b/drivers/clk/socfpga/clk.c index 81dd31a686df..c3784899f002 100644 --- a/drivers/clk/socfpga/clk.c +++ b/drivers/clk/socfpga/clk.c @@ -121,9 +121,7 @@ static __init struct clk *socfpga_clk_init(struct device_node *node, int rc; u32 fixed_div; - rc = of_property_read_u32(node, "reg", ®); - if (WARN_ON(rc)) - return NULL; + of_property_read_u32(node, "reg", ®); socfpga_clk = kzalloc(sizeof(*socfpga_clk), GFP_KERNEL); if (WARN_ON(!socfpga_clk)) -- 2.20.1