From 4cbb225d48b6fe1e5a0889d70826a16c49b01462 Mon Sep 17 00:00:00 2001 From: Eunseok Choi Date: Wed, 28 Jun 2017 22:23:51 +0900 Subject: [PATCH] [COMMON] thermal: samsung: remove unused codes Change-Id: I6506da0636b308a0364402a816de2d045641070b Signed-off-by: Eunseok Choi --- drivers/thermal/samsung/exynos_tmu.c | 804 --------------------------- 1 file changed, 804 deletions(-) diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c index 80e4d496f2e8..cafa8639cdd0 100644 --- a/drivers/thermal/samsung/exynos_tmu.c +++ b/drivers/thermal/samsung/exynos_tmu.c @@ -173,19 +173,11 @@ #define EXYNOS_TMU_TEM1051X_SENSE_VALUE (0x028A) #define EXYNOS_TMU_NUM_PROBE_SHIFT (16) -#if defined(CONFIG_SOC_EXYNOS9810) #define EXYNOS_TMU_NUM_PROBE_MASK (0xf) -#else -#define EXYNOS_TMU_NUM_PROBE_MASK (0x7) -#endif #define EXYNOS_TMU_LPI_MODE_SHIFT (10) #define EXYNOS_TMU_LPI_MODE_MASK (1) -#if defined(CONFIG_SOC_EXYNOS9810) #define TOTAL_SENSORS 16 -#else -#define TOTAL_SENSORS 8 -#endif #define DEFAULT_BALANCE_OFFSET 20 #ifdef CONFIG_EXYNOS_ACPM_THERMAL @@ -210,8 +202,6 @@ static bool is_cpu_hotplugged_out; /* list of multiple instance for each thermal sensor */ static LIST_HEAD(dtm_dev_list); -static u32 global_avg_con; - static u32 t_bgri_trim; static u32 t_vref_trim; static u32 t_vbei_trim; @@ -228,33 +218,6 @@ static void exynos_report_trigger(struct exynos_tmu_data *p) thermal_zone_device_update(tz, THERMAL_EVENT_UNSPECIFIED); } -/* - * TMU treats temperature as a mapped temperature code. - * The temperature is converted differently depending on the calibration type. - */ -static int temp_to_code(struct exynos_tmu_data *data, u8 temp) -{ - struct exynos_tmu_platform_data *pdata = data->pdata; - int temp_code; - - switch (pdata->cal_type) { - case TYPE_TWO_POINT_TRIMMING: - temp_code = (temp - pdata->first_point_trim) * - (data->temp_error2 - data->temp_error1) / - (pdata->second_point_trim - pdata->first_point_trim) + - data->temp_error1; - break; - case TYPE_ONE_POINT_TRIMMING: - temp_code = temp + data->temp_error1 - pdata->first_point_trim; - break; - default: - temp_code = temp + pdata->default_temp_offset; - break; - } - - return temp_code; -} - /* * TMU treats temperature with the index as a mapped temperature code. * The temperature is converted differently depending on the calibration type. @@ -367,24 +330,6 @@ static int exynos_tmu_initialize(struct platform_device *pdev) return ret; } -static u32 get_con_reg(struct exynos_tmu_data *data, u32 con) -{ - struct exynos_tmu_platform_data *pdata = data->pdata; - - con &= ~(EXYNOS_TMU_REF_VOLTAGE_MASK << EXYNOS_TMU_REF_VOLTAGE_SHIFT); - con |= pdata->reference_voltage << EXYNOS_TMU_REF_VOLTAGE_SHIFT; - - con &= ~(EXYNOS_TMU_BUF_SLOPE_SEL_MASK << EXYNOS_TMU_BUF_SLOPE_SEL_SHIFT); - con |= (pdata->gain << EXYNOS_TMU_BUF_SLOPE_SEL_SHIFT); - - if (pdata->noise_cancel_mode) { - con &= ~(EXYNOS_TMU_TRIP_MODE_MASK << EXYNOS_TMU_TRIP_MODE_SHIFT); - con |= (pdata->noise_cancel_mode << EXYNOS_TMU_TRIP_MODE_SHIFT); - } - - return con; -} - static void exynos_tmu_control(struct platform_device *pdev, bool on) { struct exynos_tmu_data *data = platform_get_drvdata(pdev); @@ -394,579 +339,6 @@ static void exynos_tmu_control(struct platform_device *pdev, bool on) mutex_unlock(&data->lock); } -static int exynos8890_tmu_initialize(struct platform_device *pdev) -{ - struct exynos_tmu_data *data = platform_get_drvdata(pdev); - struct thermal_zone_device *tz = data->tzd; - struct exynos_tmu_platform_data *pdata = data->pdata; - unsigned int rising_threshold = 0, falling_threshold = 0; - int temp, temp_hist; - unsigned int trim_info; - unsigned int reg_off, bit_off; - int threshold_code, i; - - /* Check tmu core ready status */ - trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO(0)); - - /* Check thermal calibration type */ - pdata->cal_type = (trim_info >> EXYNOS_TMU_CALIB_SEL_SHIFT) - & EXYNOS_TMU_CALIB_SEL_MASK; - - /* Check temp_error1 and error2 value */ - data->temp_error1 = trim_info & EXYNOS_TMU_TEMP_MASK; - data->temp_error2 = (trim_info >> EXYNOS_TMU_TRIMINFO_85_P0_SHIFT) - & EXYNOS_TMU_TEMP_MASK; - - if (!data->temp_error1) - data->temp_error1 = pdata->efuse_value & EXYNOS_TMU_TEMP_MASK; - if (!data->temp_error2) - data->temp_error2 = (pdata->efuse_value >> - EXYNOS_TMU_TRIMINFO_85_P0_SHIFT) - & EXYNOS_TMU_TEMP_MASK; - /* Write temperature code for rising and falling threshold */ - for (i = (of_thermal_get_ntrips(tz) - 1); i >= 0; i--) { - /* - * On exynos7 there are 4 rising and 4 falling threshold - * registers (0x50-0x5c and 0x60-0x6c respectively). Each - * register holds the value of two threshold levels (at bit - * offsets 0 and 16). Based on the fact that there are atmost - * eight possible trigger levels, calculate the register and - * bit offsets where the threshold levels are to be written. - * - * e.g. EXYNOS_THD_TEMP_RISE7_6 (0x50) - * [24:16] - Threshold level 7 - * [8:0] - Threshold level 6 - * e.g. EXYNOS_THD_TEMP_RISE5_4 (0x54) - * [24:16] - Threshold level 5 - * [8:0] - Threshold level 4 - * - * and similarly for falling thresholds. - * - * Based on the above, calculate the register and bit offsets - * for rising/falling threshold levels and populate them. - */ - reg_off = ((7 - i) / 2) * 4; - bit_off = ((8 - i) % 2); - - tz->ops->get_trip_temp(tz, i, &temp); - temp /= MCELSIUS; - - tz->ops->get_trip_hyst(tz, i, &temp_hist); - temp_hist = temp - (temp_hist / MCELSIUS); - - /* Set 9-bit temperature code for rising threshold levels */ - threshold_code = temp_to_code(data, temp); - rising_threshold = readl(data->base + - EXYNOS_THD_TEMP_RISE7_6 + reg_off); - rising_threshold &= ~(EXYNOS_TMU_TEMP_MASK << (16 * bit_off)); - rising_threshold |= threshold_code << (16 * bit_off); - writel(rising_threshold, - data->base + EXYNOS_THD_TEMP_RISE7_6 + reg_off); - - /* Set 9-bit temperature code for falling threshold levels */ - threshold_code = temp_to_code(data, temp_hist); - falling_threshold &= ~(EXYNOS_TMU_TEMP_MASK << (16 * bit_off)); - falling_threshold |= threshold_code << (16 * bit_off); - writel(falling_threshold, - data->base + EXYNOS_THD_TEMP_FALL7_6 + reg_off); - } - - data->tmu_clear_irqs(data); - - return 0; -} - -static void exynos8890_tmu_control(struct platform_device *pdev, bool on) -{ - struct exynos_tmu_data *data = platform_get_drvdata(pdev); - struct thermal_zone_device *tz = data->tzd; - unsigned int con, interrupt_en, trim_info, trim_info1; - unsigned int t_buf_vref_sel, t_buf_slope_sel; - - trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO(0)); - trim_info1 = readl(data->base + EXYNOS_TMU_REG_TRIMINFO(1)); - - /* Save fuse buf_vref_sel, calib_sel value to TRIMINFO and 1 register */ - t_buf_vref_sel = (trim_info >> EXYNOS_TMU_T_BUF_VREF_SEL_SHIFT) - & (EXYNOS_TMU_T_BUF_VREF_SEL_MASK); - t_buf_slope_sel = (trim_info1 >> EXYNOS_TMU_T_BUF_SLOPE_SEL_SHIFT) - & (EXYNOS_TMU_T_BUF_SLOPE_SEL_MASK); - - con = get_con_reg(data, readl(data->base + EXYNOS_TMU_REG_CONTROL)); - - if (on) { - con |= (t_buf_vref_sel << EXYNOS_TMU_REF_VOLTAGE_SHIFT); - con |= (t_buf_slope_sel << EXYNOS_TMU_BUF_SLOPE_SEL_SHIFT); - con |= (1 << EXYNOS_TMU_CORE_EN_SHIFT); - con |= (1 << EXYNOS_TMU_THERM_TRIP_EN_SHIFT); - interrupt_en = - (of_thermal_is_trip_valid(tz, 7) - << EXYNOS_TMU_INTEN_RISE7_SHIFT) | - (of_thermal_is_trip_valid(tz, 6) - << EXYNOS_TMU_INTEN_RISE6_SHIFT) | - (of_thermal_is_trip_valid(tz, 5) - << EXYNOS_TMU_INTEN_RISE5_SHIFT) | - (of_thermal_is_trip_valid(tz, 4) - << EXYNOS_TMU_INTEN_RISE4_SHIFT) | - (of_thermal_is_trip_valid(tz, 3) - << EXYNOS_TMU_INTEN_RISE3_SHIFT) | - (of_thermal_is_trip_valid(tz, 2) - << EXYNOS_TMU_INTEN_RISE2_SHIFT) | - (of_thermal_is_trip_valid(tz, 1) - << EXYNOS_TMU_INTEN_RISE1_SHIFT) | - (of_thermal_is_trip_valid(tz, 0) - << EXYNOS_TMU_INTEN_RISE0_SHIFT); - - interrupt_en |= - interrupt_en << EXYNOS_TMU_INTEN_FALL0_SHIFT; - } else { - con &= ~(1 << EXYNOS_TMU_CORE_EN_SHIFT); - con &= ~(1 << EXYNOS_TMU_THERM_TRIP_EN_SHIFT); - interrupt_en = 0; /* Disable all interrupts */ - } - - writel(interrupt_en, data->base + EXYNOS_TMU_REG_INTEN0); - writel(con, data->base + EXYNOS_TMU_REG_CONTROL); -} - -static int exynos8895_tmu_initialize(struct platform_device *pdev) -{ - struct exynos_tmu_data *data = platform_get_drvdata(pdev); - struct thermal_zone_device *tz = data->tzd; - struct exynos_tmu_platform_data *pdata = data->pdata; - unsigned int rising_threshold = 0, falling_threshold = 0; - int temp, temp_hist; - unsigned int trim_info; - unsigned int reg_off = 0, bit_off; - int threshold_code, i; - int sensor; - int count = 0, interrupt_count = 0; - enum thermal_trip_type type; - - u16 cal_type; - u32 temp_error1; - u32 temp_error2; - - trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO(0)); - cal_type = (trim_info >> EXYNOS_TMU_CALIB_SEL_SHIFT) & EXYNOS_TMU_CALIB_SEL_MASK; - - for (sensor = 0; sensor < TOTAL_SENSORS; sensor++) { - /* If the sensor is used, save its information. */ - if (data->sensors & (1 << sensor)) { - /* Read the sensor error value from TRIMINFOX */ - trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO(sensor)); - temp_error1 = trim_info & EXYNOS_TMU_TEMP_MASK; - temp_error2 = (trim_info >> EXYNOS_TMU_TRIMINFO_85_P0_SHIFT) & EXYNOS_TMU_TEMP_MASK; - - /* Save sensor id */ - data->sensor_info[count].sensor_num = sensor; - dev_info(&pdev->dev, "Sensor number = %d\n", sensor); - - /* Check thermal calibration type */ - data->sensor_info[count].cal_type = cal_type; - - /* Check temp_error1 value */ - data->sensor_info[count].temp_error1 = temp_error1; - if (!data->sensor_info[count].temp_error1) - data->sensor_info[count].temp_error1 = pdata->efuse_value & EXYNOS_TMU_TEMP_MASK; - - /* Check temp_error2 if calibration type is TYPE_TWO_POINT_TRIMMING */ - if (data->sensor_info[count].cal_type == TYPE_TWO_POINT_TRIMMING) { - data->sensor_info[count].temp_error2 = temp_error2; - - if (!data->sensor_info[count].temp_error2) - data->sensor_info[count].temp_error2 = (pdata->efuse_value >> EXYNOS_TMU_TRIMINFO_85_P0_SHIFT) - & EXYNOS_TMU_TEMP_MASK; - } - } - - if (data->sensors & (1 << sensor)) { - interrupt_count = 0; - /* Write temperature code for rising and falling threshold */ - for (i = (of_thermal_get_ntrips(tz) - 1); i >= 0; i--) { - /* - * On exynos8 there are 4 rising and 4 falling threshold - * registers (0x50-0x5c and 0x60-0x6c respectively). Each - * register holds the value of two threshold levels (at bit - * offsets 0 and 16). Based on the fact that there are atmost - * eight possible trigger levels, calculate the register and - * bit offsets where the threshold levels are to be written. - * - * e.g. EXYNOS_THD_TEMP_RISE7_6 (0x50) - * [24:16] - Threshold level 7 - * [8:0] - Threshold level 6 - * e.g. EXYNOS_THD_TEMP_RISE5_4 (0x54) - * [24:16] - Threshold level 5 - * [8:0] - Threshold level 4 - * - * and similarly for falling thresholds. - * - * Based on the above, calculate the register and bit offsets - * for rising/falling threshold levels and populate them. - */ - - tz->ops->get_trip_type(tz, i, &type); - - if (type == THERMAL_TRIP_PASSIVE) - continue; - - reg_off = (interrupt_count / 2) * 4; - bit_off = ((interrupt_count + 1) % 2); - - if (sensor > 0) - reg_off = reg_off + EXYNOS_THD_TEMP_R_OFFSET + sensor * 0x20; - - tz->ops->get_trip_temp(tz, i, &temp); - temp /= MCELSIUS; - - tz->ops->get_trip_hyst(tz, i, &temp_hist); - temp_hist = temp - (temp_hist / MCELSIUS); - - /* Set 9-bit temperature code for rising threshold levels */ - threshold_code = temp_to_code_with_sensorinfo(data, temp, &data->sensor_info[count]); - rising_threshold = readl(data->base + - EXYNOS_THD_TEMP_RISE7_6 + reg_off); - rising_threshold &= ~(EXYNOS_TMU_TEMP_MASK << (16 * bit_off)); - rising_threshold |= threshold_code << (16 * bit_off); - writel(rising_threshold, - data->base + EXYNOS_THD_TEMP_RISE7_6 + reg_off); - - /* Set 9-bit temperature code for falling threshold levels */ - threshold_code = temp_to_code_with_sensorinfo(data, temp_hist, &data->sensor_info[count]); - falling_threshold &= ~(EXYNOS_TMU_TEMP_MASK << (16 * bit_off)); - falling_threshold |= threshold_code << (16 * bit_off); - writel(falling_threshold, - data->base + EXYNOS_THD_TEMP_FALL7_6 + reg_off); - - interrupt_count++; - } - count++; - } - } - - data->tmu_clear_irqs(data); - - return 0; -} - -static void exynos8895_tmu_control(struct platform_device *pdev, bool on) -{ - struct exynos_tmu_data *data = platform_get_drvdata(pdev); - struct thermal_zone_device *tz = data->tzd; - unsigned int con, con1, interrupt_en, trim_info, trim_info1, trim_info2; - unsigned int t_buf_vref_sel, t_buf_slope_sel; - unsigned int bit_off; - int i, interrupt_count = 0; - u32 avg_con, avg_sel; - u32 mux_val; - u32 counter_value0, counter_value1; - enum thermal_trip_type type; - - interrupt_en = 0; - con = readl(data->base + EXYNOS_TMU_REG_CONTROL); - con &= ~(1 << EXYNOS_TMU_CORE_EN_SHIFT); - con &= ~(1 << EXYNOS_TMU_THERM_TRIP_EN_SHIFT); - writel(con, data->base + EXYNOS_TMU_REG_CONTROL); - con = 0; - - con1 = readl(data->base + EXYNOS_TMU_REG_CONTROL1); - con1 &= ~(EXYNOS_TMU_NUM_PROBE_MASK << EXYNOS_TMU_NUM_PROBE_SHIFT); - con1 |= (data->num_probe << EXYNOS_TMU_NUM_PROBE_SHIFT); - writel(con1, data->base + EXYNOS_TMU_REG_CONTROL1); - - trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO(0)); - trim_info1 = readl(data->base + EXYNOS_TMU_REG_TRIMINFO(1)); - trim_info2 = readl(data->base + EXYNOS_TMU_REG_TRIMINFO(2)); - - /* Save fuse buf_vref_sel, calib_sel value to TRIMINFO and 1 register */ - t_buf_vref_sel = (trim_info >> EXYNOS_TMU_T_BUF_VREF_SEL_SHIFT) - & (EXYNOS_TMU_T_BUF_VREF_SEL_MASK); - t_buf_slope_sel = (trim_info1 >> EXYNOS_TMU_T_BUF_SLOPE_SEL_SHIFT) - & (EXYNOS_TMU_T_BUF_SLOPE_SEL_MASK); - avg_sel = (trim_info2 >> EXYNOS_TMU_AVG_CON_SHIFT) & EXYNOS_TMU_AVG_CON_MASK; - - con = get_con_reg(data, readl(data->base + EXYNOS_TMU_REG_CONTROL)); - avg_con = readl(data->base + EXYNOS_TMU_REG_AVG_CON); - - if (avg_sel) { - avg_con |= ((avg_con & EXYNOS_TMU_AVG_MODE_MASK) | EXYNOS_TMU_AVG_MODE_DEFAULT); - avg_con &= ~(EXYNOS_TMU_DEM_ENABLE << EXYNOS_TMU_DEM_SHIFT); - } else { - avg_con |= ((avg_con & EXYNOS_TMU_AVG_MODE_MASK) | EXYNOS_TMU_AVG_MODE_4); - avg_con |= EXYNOS_TMU_DEM_ENABLE << EXYNOS_TMU_DEM_SHIFT; - } - - if (data->id == 0 || data->id == 1) - global_avg_con = avg_con; - - /* Set MUX_ADDR SFR according to sensor_type */ - switch (data->pdata->sensor_type) { - case TEM1456X : - counter_value0 = readl(data->base + EXYNOS_TMU_REG_COUNTER_VALUE0); - counter_value0 &= ~(EXYNOS_TMU_EN_TEMP_SEN_OFF_MASK << EXYNOS_TMU_EN_TEMP_SEN_OFF_SHIFT); - counter_value0 |= EXYNOS_TMU_TEM1456X_SENSE_VALUE << EXYNOS_TMU_EN_TEMP_SEN_OFF_SHIFT; - writel(counter_value0, data->base + EXYNOS_TMU_REG_COUNTER_VALUE0); - - counter_value1 = readl(data->base + EXYNOS_TMU_REG_COUNTER_VALUE1); - counter_value1 &= ~(EXYNOS_TMU_CLK_SENSE_ON_MASK << EXYNOS_TMU_CLK_SENSE_ON_SHIFT); - counter_value1 |= EXYNOS_TMU_TEM1456X_SENSE_VALUE << EXYNOS_TMU_CLK_SENSE_ON_SHIFT; - writel(counter_value1, data->base + EXYNOS_TMU_REG_COUNTER_VALUE1); - case TEM1455X : - mux_val = (data->pdata->sensor_type << EXYNOS_TMU_MUX_ADDR_SHIFT); - con |= (con & ~(EXYNOS_TMU_MUX_ADDR_MASK << EXYNOS_TMU_MUX_ADDR_SHIFT)) | mux_val; - break; - } - - if (on) { - con |= (t_buf_vref_sel << EXYNOS_TMU_REF_VOLTAGE_SHIFT); - con |= (t_buf_slope_sel << EXYNOS_TMU_BUF_SLOPE_SEL_SHIFT); - con |= (1 << EXYNOS_TMU_CORE_EN_SHIFT); - con |= (1 << EXYNOS_TMU_THERM_TRIP_EN_SHIFT); - - for (i = (of_thermal_get_ntrips(tz) - 1); i >= 0; i--) { - - tz->ops->get_trip_type(tz, i, &type); - - if (type == THERMAL_TRIP_PASSIVE) - continue; - - bit_off = EXYNOS_TMU_INTEN_RISE7_SHIFT - interrupt_count; - - interrupt_en |= of_thermal_is_trip_valid(tz, i) << bit_off; - interrupt_count++; - } - - interrupt_en |= - interrupt_en << EXYNOS_TMU_INTEN_FALL0_SHIFT; - } else { - con &= ~(1 << EXYNOS_TMU_CORE_EN_SHIFT); - con &= ~(1 << EXYNOS_TMU_THERM_TRIP_EN_SHIFT); - interrupt_en = 0; /* Disable all interrupts */ - } - - for (i = 0; i < TOTAL_SENSORS; i++) { - if (data->sensors & (1 << i)) { - int int_offset; - - if (i < 5) - int_offset = EXYNOS_TMU_REG_INTEN0 + EXYNOS_TMU_REG_INTEN_OFFSET * i; - else - int_offset = EXYNOS_TMU_REG_INTEN5 + EXYNOS_TMU_REG_INTEN_OFFSET * (i - 5) ; - - writel(interrupt_en, data->base + int_offset); - } - } - writel(con, data->base + EXYNOS_TMU_REG_CONTROL); - - /* Only TEM1002X sensor needs AVG_CON setting */ - if (data->pdata->sensor_type == TEM1002X) - writel(global_avg_con, data->base + EXYNOS_TMU_REG_AVG_CON); - -} - -static int exynos78XX_tmu_initialize(struct platform_device *pdev) -{ - struct exynos_tmu_data *data = platform_get_drvdata(pdev); - struct thermal_zone_device *tz = data->tzd; - struct exynos_tmu_platform_data *pdata = data->pdata; - unsigned int rising_threshold = 0, falling_threshold = 0; - int temp, temp_hist; - unsigned int trim_info; - unsigned int reg_off = 0, bit_off; - int threshold_code, i; - int sensor; - int count = 0, interrupt_count = 0; - enum thermal_trip_type type; - - u16 cal_type; - u32 temp_error1; - u32 temp_error2; - - trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO(0)); - cal_type = (trim_info >> EXYNOS_TMU_CALIB_SEL_SHIFT) & EXYNOS_TMU_CALIB_SEL_MASK; - - for (sensor = 0; sensor < TOTAL_SENSORS; sensor++) { - /* If the sensor is used, save its information. */ - if (data->sensors & (1 << sensor)) { - /* Read the sensor error value from TRIMINFOX */ - trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO(sensor)); - temp_error1 = trim_info & EXYNOS_TMU_TEMP_MASK; - temp_error2 = (trim_info >> EXYNOS_TMU_TRIMINFO_85_P0_SHIFT) & EXYNOS_TMU_TEMP_MASK; - - /* Save sensor id */ - data->sensor_info[count].sensor_num = sensor; - dev_info(&pdev->dev, "Sensor number = %d\n", sensor); - - /* Check thermal calibration type */ - data->sensor_info[count].cal_type = cal_type; - - /* Check temp_error1 value */ - data->sensor_info[count].temp_error1 = temp_error1; - if (!data->sensor_info[count].temp_error1) - data->sensor_info[count].temp_error1 = pdata->efuse_value & EXYNOS_TMU_TEMP_MASK; - - /* Check temp_error2 if calibration type is TYPE_TWO_POINT_TRIMMING */ - if (data->sensor_info[count].cal_type == TYPE_TWO_POINT_TRIMMING) { - data->sensor_info[count].temp_error2 = temp_error2; - - if (!data->sensor_info[count].temp_error2) - data->sensor_info[count].temp_error2 = - ((pdata->efuse_value + 60) >> EXYNOS_TMU_TRIMINFO_85_P0_SHIFT) - & EXYNOS_TMU_TEMP_MASK; - } - } - - if (data->sensors & (1 << sensor)) { - interrupt_count = 0; - /* Write temperature code for rising and falling threshold */ - for (i = (of_thermal_get_ntrips(tz) - 1); i >= 0; i--) { - /* - * On exynos8 there are 4 rising and 4 falling threshold - * registers (0x50-0x5c and 0x60-0x6c respectively). Each - * register holds the value of two threshold levels (at bit - * offsets 0 and 16). Based on the fact that there are atmost - * eight possible trigger levels, calculate the register and - * bit offsets where the threshold levels are to be written. - * - * e.g. EXYNOS_THD_TEMP_RISE7_6 (0x50) - * [24:16] - Threshold level 7 - * [8:0] - Threshold level 6 - * e.g. EXYNOS_THD_TEMP_RISE5_4 (0x54) - * [24:16] - Threshold level 5 - * [8:0] - Threshold level 4 - * - * and similarly for falling thresholds. - * - * Based on the above, calculate the register and bit offsets - * for rising/falling threshold levels and populate them. - */ - - tz->ops->get_trip_type(tz, i, &type); - - if (type == THERMAL_TRIP_PASSIVE) - continue; - - reg_off = (interrupt_count / 2) * 4; - bit_off = ((interrupt_count + 1) % 2); - - if (sensor > 0) - reg_off = reg_off + EXYNOS_THD_TEMP_R_OFFSET + sensor * 0x20; - - tz->ops->get_trip_temp(tz, i, &temp); - temp /= MCELSIUS; - - tz->ops->get_trip_hyst(tz, i, &temp_hist); - temp_hist = temp - (temp_hist / MCELSIUS); - - /* Set 9-bit temperature code for rising threshold levels */ - threshold_code = temp_to_code_with_sensorinfo(data, temp, &data->sensor_info[count]); - rising_threshold = readl(data->base + - EXYNOS_THD_TEMP_RISE7_6 + reg_off); - rising_threshold &= ~(EXYNOS_TMU_TEMP_MASK << (16 * bit_off)); - rising_threshold |= threshold_code << (16 * bit_off); - writel(rising_threshold, - data->base + EXYNOS_THD_TEMP_RISE7_6 + reg_off); - - falling_threshold &= ~(EXYNOS_TMU_TEMP_MASK << (16 * bit_off)); - falling_threshold |= threshold_code << (16 * bit_off); - writel(falling_threshold, - data->base + EXYNOS_THD_TEMP_FALL7_6 + reg_off); - - interrupt_count++; - } - count++; - } - } - - data->tmu_clear_irqs(data); - - return 0; -} - -static void exynos78XX_tmu_control(struct platform_device *pdev, bool on) -{ - struct exynos_tmu_data *data = platform_get_drvdata(pdev); - struct thermal_zone_device *tz = data->tzd; - unsigned int con, con1, interrupt_en, trim_info, trim_info1; - unsigned int ptat_cont, buf_cont; - unsigned int bit_off; - int i, interrupt_count = 0; - u32 mux_val; - u32 counter_value0, counter_value1; - enum thermal_trip_type type; - - interrupt_en = 0; - con = readl(data->base + EXYNOS_TMU_REG_CONTROL); - con &= ~(1 << EXYNOS_TMU_CORE_EN_SHIFT); - con &= ~(1 << EXYNOS_TMU_THERM_TRIP_EN_SHIFT); - writel(con, data->base + EXYNOS_TMU_REG_CONTROL); - - trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO(0)); - trim_info1 = readl(data->base + EXYNOS_TMU_REG_TRIMINFO(1)); - - /* Save PTAT_CONT, BUF_CONT value from TRIMINFO and TRIMINFO1 register */ - ptat_cont = (trim_info >> EXYNOS_TMU_T_BUF_VREF_SEL_SHIFT) - & (EXYNOS_TMU_T_PTAT_CONT_MASK); - buf_cont = (trim_info1 >> EXYNOS_TMU_T_BUF_SLOPE_SEL_SHIFT) - & (EXYNOS_TMU_T_BUF_CONT_MASK); - - con = get_con_reg(data, readl(data->base + EXYNOS_TMU_REG_CONTROL)); - con1 = readl(data->base + EXYNOS_TMU_REG_CONTROL1); - - /* Set MUX_ADDR SFR according to sensor_type */ - switch (data->pdata->sensor_type) { - case TEM1456X : - counter_value0 = readl(data->base + EXYNOS_TMU_REG_COUNTER_VALUE0); - counter_value0 &= ~(EXYNOS_TMU_EN_TEMP_SEN_OFF_MASK << EXYNOS_TMU_EN_TEMP_SEN_OFF_SHIFT); - counter_value0 |= EXYNOS_TMU_TEM1456X_SENSE_VALUE << EXYNOS_TMU_EN_TEMP_SEN_OFF_SHIFT; - writel(counter_value0, data->base + EXYNOS_TMU_REG_COUNTER_VALUE0); - - counter_value1 = readl(data->base + EXYNOS_TMU_REG_COUNTER_VALUE1); - counter_value1 &= ~(EXYNOS_TMU_CLK_SENSE_ON_MASK << EXYNOS_TMU_CLK_SENSE_ON_SHIFT); - counter_value1 |= EXYNOS_TMU_TEM1456X_SENSE_VALUE << EXYNOS_TMU_CLK_SENSE_ON_SHIFT; - writel(counter_value1, data->base + EXYNOS_TMU_REG_COUNTER_VALUE1); - break; - case TEM1455X : - mux_val = (data->pdata->sensor_type << EXYNOS_TMU_MUX_ADDR_SHIFT); - con &= ~(EXYNOS_TMU_MUX_ADDR_MASK << EXYNOS_TMU_MUX_ADDR_SHIFT); - con |= (data->pdata->sensor_type << EXYNOS_TMU_MUX_ADDR_SHIFT); - break; - } - - if (on) { - con1 &= ~(EXYNOS_TMU_PTAT_CON_MASK << EXYNOS_TMU_PTAT_CON_SHIFT); - con1 &= ~(EXYNOS_TMU_BUF_CONT_MASK << EXYNOS_TMU_BUF_CONT_SHIFT); - con1 |= (ptat_cont << EXYNOS_TMU_PTAT_CON_SHIFT); - con1 |= (buf_cont << EXYNOS_TMU_BUF_CONT_SHIFT); - - con |= (1 << EXYNOS_TMU_CORE_EN_SHIFT); - con |= (1 << EXYNOS_TMU_THERM_TRIP_EN_SHIFT); - - for (i = (of_thermal_get_ntrips(tz) - 1); i >= 0; i--) { - - tz->ops->get_trip_type(tz, i, &type); - - if (type == THERMAL_TRIP_PASSIVE) - continue; - - bit_off = EXYNOS_TMU_INTEN_RISE7_SHIFT - interrupt_count; - - interrupt_en |= of_thermal_is_trip_valid(tz, i) << bit_off; - interrupt_count++; - } - - interrupt_en |= interrupt_en << EXYNOS_TMU_INTEN_FALL0_SHIFT; - } else { - con &= ~(1 << EXYNOS_TMU_CORE_EN_SHIFT); - con &= ~(1 << EXYNOS_TMU_THERM_TRIP_EN_SHIFT); - interrupt_en = 0; /* Disable all interrupts */ - } - - writel(interrupt_en, data->base + EXYNOS_TMU_REG_INTEN0); - writel(con, data->base + EXYNOS_TMU_REG_CONTROL); - writel(con1, data->base + EXYNOS_TMU_REG_CONTROL1); -} - static int exynos9810_tmu_initialize(struct platform_device *pdev) { #define NZVYT_LOTID 0x152633 @@ -1317,58 +689,6 @@ static int exynos_get_trend(void *p, int trip, enum thermal_trend *trend) } #ifdef CONFIG_THERMAL_EMULATION -static u32 get_emul_con_reg(struct exynos_tmu_data *data, unsigned int val, - int temp) -{ - if (temp) { - temp /= MCELSIUS; - val &= ~(EXYNOS_EMUL_DATA_MASK << - EXYNOS_EMUL_DATA_SHIFT); - val |= (temp_to_code(data, temp) << - EXYNOS_EMUL_DATA_SHIFT) | - EXYNOS_EMUL_ENABLE; - } else { - val &= ~EXYNOS_EMUL_ENABLE; - } - - return val; -} - -static void exynos8890_tmu_set_emulation(struct exynos_tmu_data *data, - int temp) -{ - unsigned int val; - u32 emul_con; - - emul_con = EXYNOS_TMU_REG_EMUL_CON; - - val = readl(data->base + emul_con); - val = get_emul_con_reg(data, val, temp); - writel(val, data->base + emul_con); -} - -static void exynos8895_tmu_set_emulation(struct exynos_tmu_data *data, - int temp) -{ - unsigned int val; - u32 emul_con; - - emul_con = EXYNOS_TMU_REG_EMUL_CON; - - val = readl(data->base + emul_con); - - if (temp) { - temp /= MCELSIUS; - val &= ~(EXYNOS_EMUL_DATA_MASK << EXYNOS_EMUL_DATA_SHIFT); - val |= (temp_to_code_with_sensorinfo(data, temp, &data->sensor_info[0]) << EXYNOS_EMUL_DATA_SHIFT) - | EXYNOS_EMUL_ENABLE; - } else { - val &= ~EXYNOS_EMUL_ENABLE; - } - - writel(val, data->base + emul_con); -} - static void exynos9810_tmu_set_emulation(struct exynos_tmu_data *data, int temp) { @@ -1407,75 +727,10 @@ out: return ret; } #else -#define exynos8890_tmu_set_emulation NULL -#define exynos8895_tmu_set_emulation NULL static int exynos_tmu_set_emulation(void *drv_data, int temp) { return -EINVAL; } #endif /* CONFIG_THERMAL_EMULATION */ -static int exynos8890_tmu_read(struct exynos_tmu_data *data) -{ - return readw(data->base + EXYNOS_TMU_REG_CURRENT_TEMP1_0) & - EXYNOS_TMU_TEMP_MASK; -} - -static int exynos8895_tmu_read(struct exynos_tmu_data *data) -{ - u8 i; - u32 reg_offset, bit_offset; - u32 temp_code, temp_cel; - u32 count = 0, result = 0; - - for (i = 0; i < data->num_of_sensors; i++) { - if (data->sensor_info[i].sensor_num < 2) { - reg_offset = 0; - bit_offset = EXYNOS_TMU_TEMP_SHIFT * data->sensor_info[i].sensor_num; - } else { - reg_offset = ((data->sensor_info[i].sensor_num - 2) / 3 + 1) * 4; - bit_offset = EXYNOS_TMU_TEMP_SHIFT * ((data->sensor_info[i].sensor_num - 2) % 3); - } - - temp_code = (readl(data->base + EXYNOS_TMU_REG_CURRENT_TEMP1_0 + reg_offset) - >> bit_offset) & EXYNOS_TMU_TEMP_MASK; - temp_cel = code_to_temp_with_sensorinfo(data, temp_code, &data->sensor_info[i]); - - switch (data->sensing_mode) { - case AVG : result = result + temp_cel; - break; - case MAX : result = result > temp_cel ? result : temp_cel; - break; - case MIN : result = result < temp_cel ? result : temp_cel; - break; - case BALANCE: - if (data->sensor_info[i].sensor_num != 0) { - if (temp_cel >= data->balance_offset) - temp_cel = temp_cel - data->balance_offset; - else - temp_cel = 0; - } - result = result > temp_cel ? result : temp_cel; - break; - default : result = temp_cel; - break; - } - count++; - } - - switch (data->sensing_mode) { - case AVG : - if (count != 0) - result = result / count; - break; - case MAX : - case MIN : - case BALANCE: - default : - break; - } - - return result; -} - static int exynos9810_tmu_read(struct exynos_tmu_data *data) { int temp = 0; @@ -1501,32 +756,6 @@ static void exynos_tmu_work(struct work_struct *work) enable_irq(data->irq); } -static void exynos8890_tmu_clear_irqs(struct exynos_tmu_data *data) -{ - unsigned int val_irq; - - val_irq = readl(data->base + EXYNOS_TMU_REG_INTPEND0); - writel(val_irq, data->base + EXYNOS_TMU_REG_INTPEND0); -} - -static void exynos8895_tmu_clear_irqs(struct exynos_tmu_data *data) -{ - unsigned int i, val_irq; - u32 pend_reg; - - for (i = 0; i < TOTAL_SENSORS; i++) { - if (data->sensors & (1 << i)) { - if (i < 5) - pend_reg = EXYNOS_TMU_REG_INTPEND0 + EXYNOS_TMU_REG_INTPEN_OFFSET * i; - else - pend_reg = EXYNOS_TMU_REG_INTPEND5 + EXYNOS_TMU_REG_INTPEN_OFFSET * (i - 5); - - val_irq = readl(data->base + pend_reg); - writel(val_irq, data->base + pend_reg); - } - } -} - static void exynos9810_tmu_clear_irqs(struct exynos_tmu_data *data) { unsigned int i, val_irq; @@ -1615,9 +844,6 @@ static struct notifier_block exynos_tmu_pm_notifier = { static const struct of_device_id exynos_tmu_match[] = { { .compatible = "samsung,exynos9810-tmu", }, - { .compatible = "samsung,exynos7872-tmu", }, - { .compatible = "samsung,exynos8890-tmu", }, - { .compatible = "samsung,exynos8895-tmu", }, { /* sentinel */ }, }; MODULE_DEVICE_TABLE(of, exynos_tmu_match); @@ -1626,12 +852,6 @@ static int exynos_of_get_soc_type(struct device_node *np) { if (of_device_is_compatible(np, "samsung,exynos9810-tmu")) return SOC_ARCH_EXYNOS9810; - if (of_device_is_compatible(np, "samsung,exynos7872-tmu")) - return SOC_ARCH_EXYNOS7872; - if (of_device_is_compatible(np, "samsung,exynos8890-tmu")) - return SOC_ARCH_EXYNOS8890; - if (of_device_is_compatible(np, "samsung,exynos8895-tmu")) - return SOC_ARCH_EXYNOS8895; return -EINVAL; } @@ -1756,30 +976,6 @@ static int exynos_map_dt_data(struct platform_device *pdev) data->soc = exynos_of_get_soc_type(pdev->dev.of_node); switch (data->soc) { - case SOC_ARCH_EXYNOS8890: - data->tmu_initialize = exynos8890_tmu_initialize; - data->tmu_control = exynos8890_tmu_control; - data->tmu_read = exynos8890_tmu_read; - data->tmu_set_emulation = exynos8890_tmu_set_emulation; - data->tmu_clear_irqs = exynos8890_tmu_clear_irqs; - data->ntrip = 8; - break; - case SOC_ARCH_EXYNOS8895: - data->tmu_initialize = exynos8895_tmu_initialize; - data->tmu_control = exynos8895_tmu_control; - data->tmu_read = exynos8895_tmu_read; - data->tmu_set_emulation = exynos8895_tmu_set_emulation; - data->tmu_clear_irqs = exynos8895_tmu_clear_irqs; - data->ntrip = 8; - break; - case SOC_ARCH_EXYNOS7872: - data->tmu_initialize = exynos78XX_tmu_initialize; - data->tmu_control = exynos78XX_tmu_control; - data->tmu_read = exynos8895_tmu_read; - data->tmu_set_emulation = exynos8895_tmu_set_emulation; - data->tmu_clear_irqs = exynos8895_tmu_clear_irqs; - data->ntrip = 8; - break; case SOC_ARCH_EXYNOS9810: data->tmu_initialize = exynos9810_tmu_initialize; data->tmu_control = exynos9810_tmu_control; -- 2.20.1