From 4b6cd64eb94cca95e8a9ad0d3888f627e4070cff Mon Sep 17 00:00:00 2001 From: =?utf8?q?Ville=20Syrj=C3=A4l=C3=A4?= Date: Wed, 11 May 2016 22:44:48 +0300 Subject: [PATCH] drm/i915: Kill off dead code from skl_dpll0_enable() MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit We calculate the CDCLK_CTL value from scratch so no need to attempt some form of RMW first. Signed-off-by: Ville Syrjälä Link: http://patchwork.freedesktop.org/patch/msgid/1462995892-32416-10-git-send-email-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula --- drivers/gpu/drm/i915/intel_display.c | 5 ----- 1 file changed, 5 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index a6bdabc7cbea..76934a5a7c49 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -5562,17 +5562,12 @@ skl_dpll0_enable(struct drm_i915_private *dev_priv, unsigned int required_vco) u32 val; /* select the minimum CDCLK before enabling DPLL 0 */ - val = I915_READ(CDCLK_CTL); - val &= ~CDCLK_FREQ_SEL_MASK | ~CDCLK_FREQ_DECIMAL_MASK; - val |= CDCLK_FREQ_337_308; - if (required_vco == 8640) min_freq = 308570; else min_freq = 337500; val = CDCLK_FREQ_337_308 | skl_cdclk_decimal(min_freq); - I915_WRITE(CDCLK_CTL, val); POSTING_READ(CDCLK_CTL); -- 2.20.1